Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed ↵ | Claire Wolf | 2020-05-02 | 1 | -0/+3 |
| | | | | | | offset, fixes #1990 Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | README: explain how to do out-of-tree builds. | whitequark | 2020-04-24 | 1 | -1/+8 |
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* | ast/simplify: improve enum handling. | whitequark | 2020-04-15 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | | | | | Before this commit, enum values were serialized as attributes of form \enum_<width>_<value> where <value> was a decimal signed integer. This has multiple drawbacks: * Enums with large values would be hard to process for downstream tooling that cannot parse arbitrary precision decimals. (In fact Yosys also did not correctly process enums with large values, and would overflow `int`.) * Enum value attributes were not confined to their own namespace, making it harder for downstream tooling to enumerate all such attributes, as opposed to looking up any specific value. * Enum values could not include x or z, which are explicitly permitted in the SystemVerilog standard. After this commit, enum values are serialized as attributes of form \enum_value_<value> where <value> is a bit sequence of the appropriate width. | ||||
* | Support module/package/interface/block scope for typedef names. | Peter Crozier | 2020-03-23 | 1 | -2/+0 |
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* | Update Copyright | Claire Wolf | 2020-03-16 | 1 | -1/+1 |
| | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | License: bump year and add title | Waldir Pimenta | 2020-03-14 | 1 | -1/+1 |
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* | Small fixes | Eddie Hung | 2020-02-27 | 1 | -6/+6 |
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* | xilinx: improve specify functionality | Eddie Hung | 2020-02-27 | 1 | -1/+6 |
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* | xilinx: use specify blocks in place of abc9_{arrival,required} | Eddie Hung | 2020-02-27 | 1 | -13/+2 |
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* | Merge pull request #1642 from jjj11x/jjj11x/sv-enum | Claire Wolf | 2020-02-20 | 1 | -0/+17 |
|\ | | | | | Enum support | ||||
| * | update documentation for enums and typedefs | Jeff Wang | 2020-02-17 | 1 | -0/+17 |
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* | | Add comment for macOS dependency install | Miodrag Milanović | 2020-02-15 | 1 | -1/+1 |
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* | | Merge pull request #1661 from YosysHQ/eddie/abc9_required | Eddie Hung | 2020-02-05 | 1 | -4/+9 |
|\ \ | | | | | | | abc9: add support for required times | ||||
| * | | Fix typo | Eddie Hung | 2020-01-27 | 1 | -1/+1 |
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| * | | Update README.md for (* abc9_required *) | Eddie Hung | 2020-01-15 | 1 | -4/+9 |
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* / | Update CHANGELOG and README | David Shah | 2020-02-02 | 1 | -0/+4 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Reword (* abc9_flop *) description | Eddie Hung | 2020-01-06 | 1 | -2/+3 |
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* | Restore abc9 -keepff | Eddie Hung | 2020-01-01 | 1 | -3/+0 |
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* | Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md | Eddie Hung | 2019-12-30 | 1 | -0/+6 |
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* | Put specify/endspecify inside `` | Eddie Hung | 2019-12-20 | 1 | -4/+4 |
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* | Update README.md :: abc_ -> abc9_ | Eddie Hung | 2019-12-11 | 1 | -3/+3 |
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* | clkbufmap: Add support for inverters in clock path. | Marcin Kościelnicki | 2019-11-25 | 1 | -0/+7 |
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* | Update CHANGELOG and README | David Shah | 2019-11-22 | 1 | -0/+5 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Update CHANGELOG and README | David Shah | 2019-10-03 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Added extractinv pass | Marcin Kościelnicki | 2019-09-19 | 1 | -0/+6 |
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* | Merge pull request #1312 from YosysHQ/xaig_arrival | Eddie Hung | 2019-09-05 | 1 | -8/+5 |
|\ | | | | | Allow arrival times of sequential outputs to be specified to abc9 | ||||
| * | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-30 | 1 | -14/+14 |
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| * \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-30 | 1 | -1/+1 |
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| * \ \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-28 | 1 | -0/+15 |
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| * \ \ \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-23 | 1 | -3/+6 |
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| * | | | | | Add (* abc_arrival=<int> *) doc | Eddie Hung | 2019-08-20 | 1 | -0/+5 |
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| * | | | | | Deprecate `abc_scc_break` attribute | Eddie Hung | 2019-08-20 | 1 | -8/+0 |
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* | | | | | | Update README.md | Clifford Wolf | 2019-09-05 | 1 | -1/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | | | | Rename conflicting wires on flatten/techmap, add "hierconn" attribute, fixes ↵ | Clifford Wolf | 2019-09-05 | 1 | -0/+3 |
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | #1220 Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | | | Merge pull request #1340 from YosysHQ/eddie/abc_no_clean | Eddie Hung | 2019-08-30 | 1 | -17/+17 |
|\ \ \ \ \ | |_|_|_|/ |/| | | | | abc9 to not call "clean" at end of run (often called outside) | ||||
| * | | | | Group abc_* attribute doc with other attributes | Eddie Hung | 2019-08-29 | 1 | -17/+17 |
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* / | | | Format `-pwires` | Eddie Hung | 2019-08-30 | 1 | -1/+1 |
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* | | | Mention clkbuf_inhibit can be overridden | Eddie Hung | 2019-08-23 | 1 | -7/+8 |
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* | | | Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-23 | 1 | -3/+23 |
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| * | | Make macOS depenency clear | Miodrag Milanovic | 2019-08-23 | 1 | -2/+5 |
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| * | | Bump year in copyright notice | Clifford Wolf | 2019-08-22 | 1 | -1/+1 |
| |/ | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Clarify with 'only' | Eddie Hung | 2019-08-19 | 1 | -1/+1 |
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| * | Update doc | Eddie Hung | 2019-08-19 | 1 | -3/+4 |
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| * | Add doc for abc_* attributes | Eddie Hung | 2019-08-16 | 1 | -0/+16 |
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* | | README updates | Marcin Kościelnicki | 2019-08-13 | 1 | -0/+14 |
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* | Update README to use "read" instead of "read_verilog" | Clifford Wolf | 2019-07-29 | 1 | -48/+19 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add support for reading gzip'd input files | David Shah | 2019-07-26 | 1 | -3/+3 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Updated FreeBSD dependencies in README.md | Roman-Parise | 2019-07-14 | 1 | -1/+1 |
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* | Add "read_verilog -pwires" feature, closes #1106 | Clifford Wolf | 2019-06-19 | 1 | -0/+4 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add defaultvalue attribute | Clifford Wolf | 2019-06-19 | 1 | -0/+4 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> |