| Commit message (Expand) | Author | Age | Files | Lines |
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| | * | | opt_expr: add failing $xnor test | Eddie Hung | 2020-03-20 | 1 | -1/+13 |
| | * | | Simplify breaking tests/arch/*/fsm.ys tests | Eddie Hung | 2020-03-20 | 2 | -7/+3 |
| | * | | opt_expr: add $xor/$xnor/$_XOR_/$_XNOR_ tests | Eddie Hung | 2020-03-19 | 1 | -0/+40 |
| * | | | Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu | Eddie Hung | 2020-04-01 | 1 | -0/+63 |
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| | * | | | opt_expr: add $alu tests | Eddie Hung | 2020-03-19 | 1 | -0/+63 |
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| * | | | Merge pull request #1848 from YosysHQ/eddie/fix_dynslice | Claire Wolf | 2020-04-01 | 1 | -0/+12 |
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| | * | | | Add dynamic slicing Verilog testcase | Eddie Hung | 2020-03-31 | 1 | -0/+12 |
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| * | | | Merge pull request #1761 from YosysHQ/eddie/opt_merge_speedup | Eddie Hung | 2020-03-31 | 2 | -0/+92 |
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| | * | | | opt_merge: speedup | Eddie Hung | 2020-03-16 | 2 | -0/+92 |
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| * | | | Merge pull request #1811 from PeterCrozier/typedef_scope | N. Engelhardt | 2020-03-30 | 1 | -0/+7 |
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| | * | | | Support module/package/interface/block scope for typedef names. | Peter Crozier | 2020-03-23 | 1 | -0/+7 |
| * | | | | Add support for SystemVerilog-style `define to Verilog frontend | Rupert Swarbrick | 2020-03-27 | 4 | -0/+50 |
| * | | | | Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix | Claire Wolf | 2020-03-26 | 1 | -0/+18 |
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| | * | | | | techmap: Fix cell names with _TECHMAP_REPLACE_.* | Marcin Kościelnicki | 2020-03-23 | 1 | -0/+18 |
| * | | | | | Merge pull request #1763 from boqwxp/issue1762 | N. Engelhardt | 2020-03-23 | 5 | -0/+19 |
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| | * | | | | Do not warn on empty selection with prefixed `arg_memb`. | Alberto Gonzalez | 2020-03-23 | 1 | -0/+5 |
| | * | | | | Suppress warnings for empty `select` arguments when `-count` or `-assert-*` o... | Alberto Gonzalez | 2020-03-23 | 1 | -0/+2 |
| | * | | | | Add tests for `select` command warnings. | Alberto Gonzalez | 2020-03-23 | 3 | -0/+12 |
| * | | | | | Merge pull request #1803 from Grazfather/typedef | N. Engelhardt | 2020-03-23 | 7 | -25/+26 |
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| | * | | | | Revert typedef tests to standard grammar. | Peter | 2020-03-22 | 7 | -25/+26 |
| * | | | | | Add test for abc9+mince issue | David Shah | 2020-03-20 | 1 | -0/+17 |
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| * | | | | fsm_extract: Initialize celltypes with full design. | Marcin Kościelnicki | 2020-03-19 | 1 | -0/+33 |
| * | | | | Merge pull request #1774 from boqwxp/exec | N. Engelhardt | 2020-03-19 | 1 | -0/+6 |
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| | * | | | | Add test for `exec` command. | Alberto Gonzalez | 2020-03-16 | 1 | -0/+6 |
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| * / / / | fix argument order for macOS compatibility | N. Engelhardt | 2020-03-18 | 1 | -3/+3 |
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| * | | | Merge pull request #1759 from zeldin/constant_with_comment_redux | Miodrag Milanović | 2020-03-14 | 2 | -0/+24 |
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| | * | | | Add regression tests for new handling of comments in constants | Marcus Comstedt | 2020-03-14 | 2 | -0/+24 |
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| * | | | Merge pull request #1754 from boqwxp/precise_locations | Miodrag Milanović | 2020-03-14 | 1 | -0/+8 |
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| | * | | | verilog: add test | Eddie Hung | 2020-03-11 | 1 | -0/+8 |
| * | | | | Added back tests for logger | Miodrag Milanovic | 2020-03-13 | 4 | -0/+24 |
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| * | | | Merge pull request #1721 from YosysHQ/dave/tribuf-unused | David Shah | 2020-03-10 | 1 | -0/+14 |
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| | * | | deminout: Don't demote inouts with unused bits | David Shah | 2020-03-04 | 1 | -0/+14 |
| * | | | Fix partsel expr bit width handling and add test case | Claire Wolf | 2020-03-08 | 1 | -0/+4 |
| * | | | rpc test: make frontend listen before launching yosys & introduce safeguard i... | N. Engelhardt | 2020-03-06 | 1 | -1/+2 |
| * | | | tests: extend tests/arch/run-tests.sh for defines | Eddie Hung | 2020-03-05 | 1 | -3/+14 |
| * | | | Merge pull request #1718 from boqwxp/precise_locations | Claire Wolf | 2020-03-03 | 2 | -4/+4 |
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| | * | | | Change attribute search value to specify precise location instead of simple l... | Alberto Gonzalez | 2020-02-24 | 1 | -2/+2 |
| | * | | | Change attribute search value to specify precise location instead of simple l... | Alberto Gonzalez | 2020-02-24 | 1 | -2/+2 |
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| * | | | Merge pull request #1519 from YosysHQ/eddie/submod_po | Claire Wolf | 2020-03-03 | 1 | -0/+124 |
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| | * \ \ | Merge branch 'master' into eddie/submod_po | Eddie Hung | 2020-02-01 | 83 | -175/+2399 |
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| | * | | | | Add a quick testcase for unknown modules as inout | Eddie Hung | 2019-12-09 | 1 | -2/+24 |
| * | | | | | iopadmap: Look harder for already-present buffers. (#1731) | Marcelina Kościelnicka | 2020-03-02 | 1 | -2/+21 |
| * | | | | | Merge pull request #1724 from YosysHQ/eddie/abc9_specify | Eddie Hung | 2020-03-02 | 6 | -7/+10 |
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| | * | | | | | Revert "Fix tests/arch/xilinx/fsm.ys to count flops only" | Eddie Hung | 2020-02-27 | 1 | -3/+9 |
| | * | | | | | Cleanup tests | Eddie Hung | 2020-02-27 | 2 | -1/+1 |
| | * | | | | | Update bug1630.ys to use -lut 4 instead of lut file | Eddie Hung | 2020-02-27 | 1 | -1/+1 |
| | * | | | | | Fix tests/arch/xilinx/fsm.ys to count flops only | Eddie Hung | 2020-02-27 | 1 | -9/+3 |
| | * | | | | | Update simple_abc9 tests | Eddie Hung | 2020-02-27 | 3 | -5/+8 |
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| * / | | | | ast: fixes #1710; do not generate RTLIL for unreachable ternary | Eddie Hung | 2020-02-27 | 1 | -0/+30 |
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| * | | | | Merge pull request #1703 from YosysHQ/eddie/specify_improve | Eddie Hung | 2020-02-21 | 2 | -3/+47 |
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