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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-01 14:11:09 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-01 14:11:09 -0700 |
| commit | e79bc45975321b806b23c47a41f2eb26c16f342e (patch) | |
| tree | 7fbaf5c18c59659cab8b13277a138984859e07a5 /tests | |
| parent | f3405e7c7990f7ce1dc23d7a464c9a30e641126c (diff) | |
| parent | 5e2562f1a2e4cfa53c80f9ca6200aecc4cc6fd9b (diff) | |
| download | yosys-e79bc45975321b806b23c47a41f2eb26c16f342e.tar.gz yosys-e79bc45975321b806b23c47a41f2eb26c16f342e.tar.bz2 yosys-e79bc45975321b806b23c47a41f2eb26c16f342e.zip | |
Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu
opt_expr: improve performance on $alu and $sub
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/opt/opt_expr_alu.ys | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/tests/opt/opt_expr_alu.ys b/tests/opt/opt_expr_alu.ys new file mode 100644 index 000000000..a3361ca43 --- /dev/null +++ b/tests/opt/opt_expr_alu.ys @@ -0,0 +1,63 @@ +read_verilog <<EOT +module test(input a, output [1:0] y); +assign y = {a,1'b0} + 1'b1; +endmodule +EOT + +alumacc +equiv_opt opt_expr -fine +design -load postopt +select -assert-count 1 t:$pos +select -assert-count none t:$pos t:* %D + + +design -reset +read_verilog <<EOT +module test(input a, output [1:0] y); +assign y = {a,1'b1} + 1'b1; +endmodule +EOT + +alumacc +select -assert-count 1 t:$alu +select -assert-count none t:$alu t:* %D + + +design -reset +read_verilog <<EOT +module test(input a, output [1:0] y); +assign y = {a,1'b1} - 1'b1; +endmodule +EOT + +equiv_opt opt_expr -fine +design -load postopt +select -assert-count 1 t:$pos +select -assert-count none t:$pos t:* %D + + +design -reset +read_verilog <<EOT +module test(input a, output [3:0] y); +assign y = {a,3'b101} - 1'b1; +endmodule +EOT + +equiv_opt opt_expr -fine +design -load postopt +select -assert-count 1 t:$pos +select -assert-count none t:$pos t:* %D + + +design -reset +read_verilog <<EOT +module test(input a, output [3:0] y); +assign y = {a,3'b101} - 1'b1; +endmodule +EOT + +alumacc +equiv_opt opt_expr -fine +design -load postopt +select -assert-count 1 t:$pos +select -assert-count none t:$pos t:* %D |