| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | iopadmap: Add native support for negative-polarity output enable. | Marcelina Kościelnicka | 2021-11-09 | 1 | -8/+0 |
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| * | Fixing old e-mail addresses and deadnames | Claire Xenia Wolf | 2021-06-08 | 1 | -1/+1 |
| | | | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g; | ||||
| * | xilinx: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-09 | 1 | -37/+0 |
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| * | Update dff2dffe, dff2dffs, zinit to new FF types. | Marcelina Kościelnicka | 2020-06-23 | 1 | -24/+24 |
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| * | Add force_downto and force_upto wire attributes. | Marcelina Kościelnicka | 2020-05-19 | 1 | -0/+6 |
| | | | | | Fixes #2058. | ||||
| * | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 1 | -0/+27 |
| | | | | | | | | | | | | | | | | | This adds support for infering more kinds of flip-flops: - FFs with async set/reset and clock enable - FFs with sync set/reset - FFs with sync set/reset and clock enable Some passes have been moved (and some added) in order for dff2dffs to work correctly. This gives us complete coverage of Virtex 6+ and Spartan 6 flip-flop capabilities (though not latch capabilities). Older FPGAs also support having both a set and a reset input, which will be handled at a later data. | ||||
| * | xilinx: Add tristate buffer mapping. (#1528) | Marcin Kościelnicki | 2019-12-04 | 1 | -0/+8 |
| | | | | Fixes #1225. | ||||
| * | Use abc_{map,unmap,model}.v | Eddie Hung | 2019-08-20 | 1 | -2/+0 |
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| * | xilinx: Fix missing cell name underscore in cells_map.v | David Shah | 2019-07-25 | 1 | -2/+2 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | Add some spacing | Eddie Hung | 2019-07-10 | 1 | -9/+9 |
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| * | Add some ASCII art explaining mux decomposition | Eddie Hung | 2019-07-10 | 1 | -0/+21 |
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| * | Extend using A[1] to preserve don't care | Eddie Hung | 2019-07-09 | 1 | -1/+9 |
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| * | Extend during mux decomposition with 1'bx | Eddie Hung | 2019-07-09 | 1 | -24/+3 |
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| * | Fix typo and comments | Eddie Hung | 2019-07-09 | 1 | -4/+4 |
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| * | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-07-09 | 1 | -19/+25 |
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| | * | Cleanup SRL inference/make more consistent | Eddie Hung | 2019-06-29 | 1 | -19/+25 |
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| * | | Decompose mux inputs in delay-orientated (rather than area) fashion | Eddie Hung | 2019-07-08 | 1 | -18/+30 |
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| * | | Add one more comment | Eddie Hung | 2019-07-08 | 1 | -0/+3 |
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| * | | Less thinking | Eddie Hung | 2019-07-08 | 1 | -3/+3 |
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| * | | Reword | Eddie Hung | 2019-07-08 | 1 | -2/+2 |
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| * | | Map $__XILINX_SHIFTX in a more balanced manner | Eddie Hung | 2019-07-08 | 1 | -36/+49 |
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| * | | Fixes for 2:1 muxes | Eddie Hung | 2019-07-08 | 1 | -4/+29 |
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| * | | Revert "Fix broken MUXFx box, use MUXF7x2 box instead" | Eddie Hung | 2019-07-01 | 1 | -29/+29 |
| | | | | | | | | | This reverts commit a9a140aa6c84e71edc1a244cfe363400c7e09d90. | ||||
| * | | Fix broken MUXFx box, use MUXF7x2 box instead | Eddie Hung | 2019-07-01 | 1 | -29/+29 |
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| * | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-06-29 | 1 | -16/+6 |
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| * | | Restore $__XILINX_MUXF78 const optimisation | Eddie Hung | 2019-06-28 | 1 | -24/+24 |
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| * | | Clean up trimming leading 1'bx in A during techmappnig | Eddie Hung | 2019-06-28 | 1 | -15/+9 |
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| * | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-06-28 | 1 | -4/+2 |
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| | * | Reduce diff with upstream | Eddie Hung | 2019-06-27 | 1 | -4/+2 |
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| * | | This optimisation doesn't seem to work... | Eddie Hung | 2019-06-25 | 1 | -24/+24 |
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| * | | Reduce MuxFx resources in mux techmapping | Eddie Hung | 2019-06-24 | 1 | -10/+30 |
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| * | | Reduce number of decomposed muxes during techmap | Eddie Hung | 2019-06-24 | 1 | -14/+11 |
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| * | | Revert "Fix techmapping muxes some more" | Eddie Hung | 2019-06-24 | 1 | -4/+4 |
| | | | | | | | | | This reverts commit 0aae3b4f4361db6d2c6b9c8d69df041f40519cec. | ||||
| * | | Fix techmapping muxes some more | Eddie Hung | 2019-06-24 | 1 | -4/+4 |
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| * | | Fix mux techmapping | Eddie Hung | 2019-06-24 | 1 | -19/+20 |
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| * | | Change synth_xilinx's -nomux to -minmuxf <int> | Eddie Hung | 2019-06-24 | 1 | -25/+41 |
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| * | | Fix spacing | Eddie Hung | 2019-06-21 | 1 | -3/+3 |
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| * | | Add $__XILINX_MUXF78 to preserve entire box | Eddie Hung | 2019-06-21 | 1 | -4/+12 |
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| * | | Revert "Remove wide mux inference" | Eddie Hung | 2019-06-14 | 1 | -0/+120 |
| |/ | | | | This reverts commit 738fdfe8f55e18ac7f315cd68c117eae370004ca. | ||||
| * | Fix name clash | Eddie Hung | 2019-06-13 | 1 | -4/+8 |
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| * | Move neg-pol to pos-pol mapping from ff_map to cells_map.v | Eddie Hung | 2019-06-12 | 1 | -0/+8 |
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| * | Remove wide mux inference | Eddie Hung | 2019-06-12 | 1 | -120/+0 |
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| * | $__XILINX_MUX_ -> $__XILINX_SHIFTX | Eddie Hung | 2019-06-06 | 1 | -9/+9 |
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| * | Fix muxcover and its techmapping | Eddie Hung | 2019-06-06 | 1 | -2/+2 |
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| * | Run muxpack and muxcover in synth_xilinx | Eddie Hung | 2019-06-06 | 1 | -0/+12 |
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| * | Cleanup | Eddie Hung | 2019-06-05 | 1 | -10/+0 |
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| * | Fix name clash | Eddie Hung | 2019-06-04 | 1 | -11/+11 |
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| * | Add mux_map.v for wide mux | Eddie Hung | 2019-06-04 | 1 | -21/+14 |
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| * | Fix/workaround symptom unveiled by #1023 | Eddie Hung | 2019-05-21 | 1 | -4/+14 |
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| * | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-05-21 | 1 | -6/+8 |
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index : iCE40/yosys | |
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