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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-05 12:28:46 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-05 12:28:46 -0700 |
| commit | 67f744d428b5385fbddc859c8e02f3e1ccfc17eb (patch) | |
| tree | 9b72bfe30f413f64064404b670bf38ab8d9e6f0d /techlibs/xilinx/cells_map.v | |
| parent | 2c18d530ea69094e7ed46dcf781d8f2517d4c61e (diff) | |
| download | yosys-67f744d428b5385fbddc859c8e02f3e1ccfc17eb.tar.gz yosys-67f744d428b5385fbddc859c8e02f3e1ccfc17eb.tar.bz2 yosys-67f744d428b5385fbddc859c8e02f3e1ccfc17eb.zip | |
Cleanup
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
| -rw-r--r-- | techlibs/xilinx/cells_map.v | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index f3422349f..4acf04744 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -18,16 +18,6 @@ * */ -// Convert negative-polarity reset to positive-polarity -(* techmap_celltype = "$_DFF_NN0_" *) -module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule -(* techmap_celltype = "$_DFF_PN0_" *) -module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule -(* techmap_celltype = "$_DFF_NN1_" *) -module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule -(* techmap_celltype = "$_DFF_PN1_" *) -module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule - module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; parameter [DEPTH-1:0] INIT = 0; |