| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Use C++11 final/override keywords. | whitequark | 2020-06-18 | 1 | -2/+2 |
| * | RTLIL: factor out RTLIL::Module::addMemory. NFC. | whitequark | 2020-06-04 | 1 | -7/+1 |
| * | techmap, flatten: remove dead options. | whitequark | 2020-06-04 | 1 | -225/+168 |
| * | flatten: split from techmap. | whitequark | 2020-06-03 | 1 | -93/+0 |
| * | techmap: remove dead variable. NFC. | whitequark | 2020-06-03 | 1 | -1/+0 |
| * | techmap: use C++11 default member initializers. NFC. | whitequark | 2020-06-02 | 1 | -16/+6 |
| * | techmap: simplify. | whitequark | 2020-06-02 | 1 | -7/+1 |
| * | techmap: use +/techmap.v instead of an ad-hoc code generator. | whitequark | 2020-06-02 | 1 | -3/+1 |
| * | techmap: Replace naughty `const_cast<>()`s. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+4 |
| * | techmap: Replace pseudo-private member usage with the range accessor function... | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| * | techmap: sort celltypeMap as it determines techmap order | Eddie Hung | 2020-05-14 | 1 | -1/+5 |
| * | Replace `std::set`s using custom comparators with `pool`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| * | techmap: prefix special wires with backslash for use as IdString | Eddie Hung | 2020-05-14 | 1 | -11/+12 |
| * | Further clean up `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+6 |
| * | Use `emplace()` for more efficient insertion into various `dict`s. | Alberto Gonzalez | 2020-05-14 | 1 | -8/+8 |
| * | Build constant bits directly rather than constructing an object and copying i... | Alberto Gonzalez | 2020-05-14 | 1 | -2/+5 |
| * | Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+2 |
| * | Use `emplace()` rather than `insert()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
| * | Clean up pseudo-private member usage and ensure range iteration uses referenc... | Alberto Gonzalez | 2020-05-14 | 1 | -17/+17 |
| * | Clean up extraneous buffer. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+2 |
| * | Replace `std::map` with `dict` for `unique_bit_id`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
| * | Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and `c... | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| * | Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outb... | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| * | Replace `std::map` with `dict` for `TechmapWires` type. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
| * | Replace `std::map` with `dict` for `celltypeMap`. | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| * | Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| * | Replace `std::map` with `dict` for `positional_ports`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
| * | Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::... | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| * | Replace `std::map` with `dict` for `simplemap_mappers`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
| * | Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -10/+10 |
| * | Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techma... | Alberto Gonzalez | 2020-05-14 | 1 | -21/+21 |
| * | Do not modify design modules while iterating over `modules()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+4 |
| * | Clean up pseudo-private member usage, superfluous `std::vector` instantiation... | Alberto Gonzalez | 2020-05-14 | 1 | -76/+70 |
| * | techmap: fix error message | Eddie Hung | 2020-04-14 | 1 | -1/+1 |
| * | kernel: big fat patch to use more ID::*, otherwise ID(*) | Eddie Hung | 2020-04-02 | 1 | -40/+40 |
| * | Merge pull request #1845 from YosysHQ/eddie/kernel_speedup | Eddie Hung | 2020-04-02 | 1 | -2/+2 |
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| | * | kernel: SigSpec use more const& + overloads to prevent implicit SigSpec | Eddie Hung | 2020-03-13 | 1 | -2/+2 |
| * | | techmap: Fix cell names with _TECHMAP_REPLACE_.* | Marcin Kościelnicki | 2020-03-23 | 1 | -1/+1 |
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| * | Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf | Eddie Hung | 2019-10-02 | 1 | -4/+8 |
| * | techmap wires named _TECHMAP_REPLACE_.<identifier> to create alias | Eddie Hung | 2019-09-30 | 1 | -0/+10 |
| * | Fix _TECHMAP_REMOVEINIT_ handling. | Marcin Kościelnicki | 2019-09-27 | 1 | -13/+17 |
| * | Trim mismatched connection to be same (smallest) size | Eddie Hung | 2019-09-20 | 1 | -0/+6 |
| * | Fix first testcase in #1391 | Eddie Hung | 2019-09-20 | 1 | -1/+1 |
| * | Add techmap_autopurge attribute, fixes #1381 | Clifford Wolf | 2019-09-19 | 1 | -5/+49 |
| * | techmap: Add support for extracting init values of ports | Marcin Kościelnicki | 2019-09-07 | 1 | -1/+70 |
| * | Rename conflicting wires on flatten/techmap, add "hierconn" attribute, fixes ... | Clifford Wolf | 2019-09-05 | 1 | -8/+24 |
| * | Add flatten handling of pre-existing wires as created by interfaces, fixes #1145 | Clifford Wolf | 2019-09-05 | 1 | -8/+20 |
| * | Grammar | Eddie Hung | 2019-08-20 | 1 | -1/+1 |
| * | techmap -max_iter to apply to each module individually | Eddie Hung | 2019-08-20 | 1 | -4/+6 |
| * | Use ID::keep more liberally too | Eddie Hung | 2019-08-15 | 1 | -1/+1 |
