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authorwhitequark <whitequark@whitequark.org>2020-06-02 23:17:46 +0000
committerwhitequark <whitequark@whitequark.org>2020-06-02 23:43:20 +0000
commit0a74368bfc1d4fadaf9efb5eb28f9e706dfdf6c9 (patch)
treeecb2d9d51fda59f192c9e3f12d2284eae2edba5f /passes/techmap/techmap.cc
parentf3e86bb32a745d300df38173b41347263696ed4b (diff)
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techmap: use C++11 default member initializers. NFC.
Diffstat (limited to 'passes/techmap/techmap.cc')
-rw-r--r--passes/techmap/techmap.cc22
1 files changed, 6 insertions, 16 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 0d7c10d0c..9227385b3 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -80,22 +80,12 @@ struct TechmapWorker
typedef dict<IdString, std::vector<TechmapWireData>> TechmapWires;
- bool extern_mode;
- bool assert_mode;
- bool flatten_mode;
- bool recursive_mode;
- bool autoproc_mode;
- bool ignore_wb;
-
- TechmapWorker()
- {
- extern_mode = false;
- assert_mode = false;
- flatten_mode = false;
- recursive_mode = false;
- autoproc_mode = false;
- ignore_wb = false;
- }
+ bool extern_mode = false;
+ bool assert_mode = false;
+ bool flatten_mode = false;
+ bool recursive_mode = false;
+ bool autoproc_mode = false;
+ bool ignore_wb = false;
std::string constmap_tpl_name(SigMap &sigmap, RTLIL::Module *tpl, RTLIL::Cell *cell, bool verbose)
{