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authorwhitequark <whitequark@whitequark.org>2020-06-03 14:35:27 +0000
committerwhitequark <whitequark@whitequark.org>2020-06-04 00:02:12 +0000
commit9338ff66b9fb86f3485f060b04f4e4b8a1fc18f6 (patch)
treec3ef5451736051cfb441f801168944449ce940aa /passes/techmap/techmap.cc
parentebbbe2156e9c5f2d04964840974c915ba8500159 (diff)
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RTLIL: factor out RTLIL::Module::addMemory. NFC.
Diffstat (limited to 'passes/techmap/techmap.cc')
-rw-r--r--passes/techmap/techmap.cc8
1 files changed, 1 insertions, 7 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 9c0402e0f..535db9465 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -174,15 +174,9 @@ struct TechmapWorker
for (auto &it : tpl->memories) {
IdString m_name = it.first;
apply_prefix(cell->name, m_name);
- RTLIL::Memory *m = new RTLIL::Memory;
- m->name = m_name;
- m->width = it.second->width;
- m->start_offset = it.second->start_offset;
- m->size = it.second->size;
- m->attributes = it.second->attributes;
+ RTLIL::Memory *m = module->addMemory(m_name, it.second);
if (m->attributes.count(ID::src))
m->add_strpool_attribute(ID::src, extra_src_attrs);
- module->memories[m->name] = m;
memory_renames[it.first] = m->name;
design->select(module, m);
}