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* Update CHANGELOG and manual for departure from upstreamEddie Hung2020-04-271-2/+2
* select: add select -unset optionEddie Hung2020-04-161-0/+1
* kernel: add design -delete optionEddie Hung2020-04-161-0/+1
* Get rid of dffsr2dff.Marcelina Kościelnicka2020-04-151-0/+1
* Add to changelogMiodrag Milanovic2020-02-171-0/+1
* Merge branch 'master' into masterRodrigo A. Melo2020-02-031-0/+1
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| * Add opt_lut_ins pass. (#1673)Marcelina Kościelnicka2020-02-031-0/+1
* | Merge branch 'master' of https://github.com/YosysHQ/yosysRodrigo Alejandro Melo2020-02-031-1/+3
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| * Update CHANGELOG and READMEDavid Shah2020-02-021-0/+1
* | Removed a line jump into the CHANGELOGRodrigo Alejandro Melo2020-02-011-3/+2
* | $readmem[hb] file inclusion is now relative to the Verilog fileRodrigo Alejandro Melo2020-01-311-1/+2
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* Add 'abc9 -dff' to CHANGELOGEddie Hung2020-01-021-0/+1
* Add CHANGELOG entry, add abc9_{flop,keep} attr to README.mdEddie Hung2019-12-301-0/+1
* Add "scratchpad" to CHANGELOGEddie Hung2019-12-181-0/+1
* xilinx: Add xilinx_dffopt pass (#1557)Marcin Kościelnicki2019-12-181-0/+1
* xilinx: Improve flip-flop handling.Marcin Kościelnicki2019-12-181-0/+2
* Update CHANGELOG and READMEDavid Shah2019-11-221-0/+2
* Add "check -mapped"Clifford Wolf2019-10-021-0/+1
* synth_xilinx: Support latches, remove used-up FF init values.Marcin Kościelnicki2019-09-301-0/+1
* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-201-0/+2
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| * Update CHANGELOGClifford Wolf2019-09-201-0/+2
* | Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dspEddie Hung2019-09-191-0/+1
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| * Added extractinv passMarcin Kościelnicki2019-09-191-0/+1
* | Add more entriesEddie Hung2019-09-191-0/+1
* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-121-0/+1
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| * Add -match-init option to dff2dffs.Marcin Kościelnicki2019-09-111-0/+1
* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-111-0/+1
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| * techmap: Add support for extracting init values of portsMarcin Kościelnicki2019-09-071-0/+1
* | Update CHANGELOGEddie Hung2019-09-101-0/+5
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* Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-281-0/+5
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| * Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-261-11/+107
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| * \ Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmapEddie Hung2019-08-231-0/+8
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| * | | minor review fixesMarcin Kościelnicki2019-08-131-2/+4
| * | | review fixesMarcin Kościelnicki2019-08-131-0/+3
* | | | Merge branch 'master' into eddie/xilinx_srlEddie Hung2019-08-261-11/+106
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| * | | Remove dupe in CHANGELOG, missing end quoteEddie Hung2019-08-261-2/+1
| * | | Merge tag 'yosys-0.9'Clifford Wolf2019-08-261-10/+106
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| | * | | Update CHANGELOGDavid Shah2019-07-261-10/+101
| | * | | Update CHANGELOGDavid Shah2019-07-091-0/+1
| | * | | Add missing CHANGELOG entriesEddie Hung2019-06-281-0/+3
* | | | | Mention shregmap -tech xilinx is supersededEddie Hung2019-08-231-1/+1
* | | | | Merge remote-tracking branch 'origin/clifford/pmgen' into eddie/xilinx_srlEddie Hung2019-08-231-0/+1
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| * | | | Add pmgen slices and choicesClifford Wolf2019-08-231-0/+1
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* / | | Add CHANGELOG entryEddie Hung2019-08-221-0/+2
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* | | Merge pull request #1209 from YosysHQ/eddie/synth_xilinxEddie Hung2019-08-201-0/+4
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| * \ \ Merge remote-tracking branch 'origin/master' into eddie/synth_xilinxEddie Hung2019-08-201-1/+8
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| * | | | Update changelogEddie Hung2019-07-221-3/+4
| * | | | Add CHANGELOG entryEddie Hung2019-07-181-0/+3
* | | | | Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgenClifford Wolf2019-08-191-0/+3
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| * | | | Merge branch 'master' into eddie/pr1266_againwhitequark2019-08-181-0/+1
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