diff options
| author | Rodrigo Alejandro Melo <rmelo@inti.gob.ar> | 2020-02-03 10:56:11 -0300 |
|---|---|---|
| committer | Rodrigo Alejandro Melo <rmelo@inti.gob.ar> | 2020-02-03 10:56:41 -0300 |
| commit | 313a425bd58f1bf0f7f48d86cf0a42a88a93c5dc (patch) | |
| tree | f35f8834f0cc30380c32d5ed3a38cb2673304931 /CHANGELOG | |
| parent | 71f3afb9a26e7bad2a9e9d59877a94cbd757cad4 (diff) | |
| parent | 7033503cd9e40e16c11fe6c805a436b0e23989dd (diff) | |
| download | yosys-313a425bd58f1bf0f7f48d86cf0a42a88a93c5dc.tar.gz yosys-313a425bd58f1bf0f7f48d86cf0a42a88a93c5dc.tar.bz2 yosys-313a425bd58f1bf0f7f48d86cf0a42a88a93c5dc.zip | |
Merge branch 'master' of https://github.com/YosysHQ/yosys
Solved a conflict into the CHANGELOG
Signed-off-by: Rodrigo Alejandro Melo <rmelo@inti.gob.ar>
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 4 |
1 files changed, 3 insertions, 1 deletions
@@ -53,7 +53,9 @@ Yosys 0.9 .. Yosys 0.9-dev - Added support for flip-flops with synchronous reset to synth_xilinx - Added support for flip-flops with reset and enable to synth_xilinx - Added "check -mapped" - - Added checking of SystemVerilog always block types (always_comb, always_latch and always_ff) + - Added checking of SystemVerilog always block types (always_comb, + always_latch and always_ff) + - Added support for SystemVerilog wildcard port connections (.*) - Added "xilinx_dffopt" pass - Added "scratchpad" pass - Added "abc9 -dff" |