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* No need for $__mul anymore?Eddie Hung2019-09-251-8/+8
* Fix signedness bugEddie Hung2019-09-201-2/+2
* Be sensitive to signednessEddie Hung2019-09-101-20/+21
* Really get rid of 'opt_expr -fine' by being explicitEddie Hung2019-09-101-6/+33
* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-052-0/+2
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| * Use a dummy box file if none specifiedEddie Hung2019-08-282-0/+2
* | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dspEddie Hung2019-08-301-1/+1
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| * | Merge branch 'master' into xc7dspDavid Shah2019-08-301-1/+1
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| | * Missing newlineEddie Hung2019-08-201-1/+1
* | | Only swap ports if $mul and not $__mulEddie Hung2019-08-131-1/+1
* | | Add DSP_A_MAXWIDTH_PARTIAL, refactorEddie Hung2019-08-131-144/+110
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* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-121-8/+36
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| * Reformat so it shows up/looks nice when "help $alu" and "help $alu+"Eddie Hung2019-08-091-25/+34
| * A bit more on where $lcu comes fromEddie Hung2019-08-091-0/+2
| * Add more commentsEddie Hung2019-08-091-4/+18
| * Add a few comments to document $alu and $lcuEddie Hung2019-08-081-9/+12
* | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-071-0/+19
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| * Add $_NMUX_, add "abc -g cmos", add proper cmos cell costsClifford Wolf2019-08-061-0/+19
* | Trim Y_WIDTHEddie Hung2019-08-011-5/+3
* | Add DSP_SIGNEDONLY backEddie Hung2019-08-011-0/+16
* | DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTHEddie Hung2019-08-011-4/+11
* | Revert "Do not do sign extension in techmap; let packer do it"Eddie Hung2019-08-011-5/+14
* | Fix B_WIDTH > DSP_B_MAXWIDTH caseEddie Hung2019-08-011-32/+14
* | Do not compute sign bit if result is zeroEddie Hung2019-07-311-1/+2
* | For signed multipliers, compute sign bit separately...Eddie Hung2019-07-311-23/+42
* | Fix spacingEddie Hung2019-07-261-3/+3
* | Add copyright header, comment on cascadeEddie Hung2019-07-241-4/+34
* | Typo for Y_WIDTHEddie Hung2019-07-231-1/+1
* | Use minimum sized width wiresEddie Hung2019-07-221-7/+13
* | Indirection via $__soft_mulEddie Hung2019-07-191-9/+9
* | Do not do sign extension in techmap; let packer do itEddie Hung2019-07-191-14/+5
* | Do not $mul -> $__mul if A and B are less than maxwidthEddie Hung2019-07-191-1/+3
* | Add a DSP_MINWIDTH macro, and soft-logic for {A_WIDTH,B_WIDTH} <= 1 tooEddie Hung2019-07-191-28/+68
* | Merge branch 'xc7dsp' into ice40dspEddie Hung2019-07-191-1/+1
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| * | Fix typo in BEddie Hung2019-07-191-1/+1
| * | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-07-181-1/+1
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* | | Use sign_headroom insteadEddie Hung2019-07-191-4/+4
* | | Do not define `DSP_SIGNEDONLY macro if no existsEddie Hung2019-07-181-4/+3
* | | Merge remote-tracking branch 'origin/master' into ice40dspEddie Hung2019-07-181-1/+1
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| * | gen_lut to return correctly sized LUT maskEddie Hung2019-07-161-1/+1
| * | Revert "Add "synth -keepdc" option"Eddie Hung2019-07-091-13/+2
| * | Add synth -keepdc optionEddie Hung2019-07-081-2/+13
* | | mul2dsp to create cells that can be interchanged with $mulEddie Hung2019-07-181-1/+7
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* | Make consistentEddie Hung2019-07-181-1/+2
* | Fix signed multiplier decompositionEddie Hung2019-07-181-29/+36
* | Working for unsignedEddie Hung2019-07-181-52/+28
* | CleanupEddie Hung2019-07-181-70/+58
* | mul2dsp: Lower partial products always have unsigned inputsDavid Shah2019-07-181-31/+41
* | Fix mul2dsp signednessEddie Hung2019-07-171-42/+38
* | A_SIGNED == B_SIGNED so flip bothEddie Hung2019-07-171-21/+12
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