diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-25 14:06:21 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-25 14:06:21 -0700 |
| commit | 1d875ac76a354f654f28b9632d83f6b43542e827 (patch) | |
| tree | f28475f58bcaed79e3ec3598cae8503cefb2432f /techlibs/common | |
| parent | 486dd7c483d4277ffb09975fb943881bdc122f4d (diff) | |
| download | yosys-1d875ac76a354f654f28b9632d83f6b43542e827.tar.gz yosys-1d875ac76a354f654f28b9632d83f6b43542e827.tar.bz2 yosys-1d875ac76a354f654f28b9632d83f6b43542e827.zip | |
No need for $__mul anymore?
Diffstat (limited to 'techlibs/common')
| -rw-r--r-- | techlibs/common/mul2dsp.v | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v index 3ca69b7b1..25ff28ab5 100644 --- a/techlibs/common/mul2dsp.v +++ b/techlibs/common/mul2dsp.v @@ -49,7 +49,7 @@ $fatal(1, "Macro DSP_NAME must be defined"); `define MAX(a,b) (a > b ? a : b)
`define MIN(a,b) (a < b ? a : b)
-(* techmap_celltype = "$mul $__mul" *)
+(* techmap_celltype = "$mul" *)
module _80_mul (A, B, Y);
parameter A_SIGNED = 0;
parameter B_SIGNED = 0;
@@ -132,9 +132,9 @@ module _80_mul (A, B, Y); end
for (i = 0; i < n; i=i+1) begin:slice
- \$__mul #(
+ \$mul #(
.A_SIGNED(sign_headroom),
- .B_SIGNED(B_SIGNED),
+ .B_SIGNED(sign_headroom),
.A_WIDTH(`DSP_A_MAXWIDTH_PARTIAL),
.B_WIDTH(B_WIDTH),
.Y_WIDTH(partial_Y_WIDTH)
@@ -161,7 +161,7 @@ module _80_mul (A, B, Y); end
end
- \$__mul #(
+ \$mul #(
.A_SIGNED(A_SIGNED),
.B_SIGNED(B_SIGNED),
.A_WIDTH(last_A_WIDTH),
@@ -197,8 +197,8 @@ module _80_mul (A, B, Y); end
for (i = 0; i < n; i=i+1) begin:slice
- \$__mul #(
- .A_SIGNED(A_SIGNED),
+ \$mul #(
+ .A_SIGNED(sign_headroom),
.B_SIGNED(sign_headroom),
.A_WIDTH(A_WIDTH),
.B_WIDTH(`DSP_B_MAXWIDTH_PARTIAL),
@@ -226,7 +226,7 @@ module _80_mul (A, B, Y); end
end
- \$__mul #(
+ \$mul #(
.A_SIGNED(A_SIGNED),
.B_SIGNED(B_SIGNED),
.A_WIDTH(A_WIDTH),
@@ -271,7 +271,7 @@ module _80_mul (A, B, Y); endgenerate
endmodule
-(* techmap_celltype = "$mul $__mul" *)
+(* techmap_celltype = "$mul" *)
module _90_soft_mul (A, B, Y);
parameter A_SIGNED = 0;
parameter B_SIGNED = 0;
|