| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Merge pull request #3727 from YosysHQ/micko/pll_bram | Miodrag Milanović | 2023-04-14 | 5 | -124/+325 |
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| | * | Add PLL and EBR related primitives | Miodrag Milanovic | 2023-04-10 | 5 | -124/+325 |
| * | | fabulous: Add support for LUT6s | gatecat | 2023-04-12 | 2 | -1/+38 |
| * | | gowin: Add serialization/deserialization primitives | YRabbit | 2023-04-12 | 1 | -0/+244 |
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| * | ecp5: Remove TRELLIS_SLICE and add TRELLIS_COMB model | gatecat | 2023-04-06 | 1 | -160/+30 |
| * | Add more DFF types | Miodrag Milanovic | 2023-04-06 | 5 | -48/+102 |
| * | Added proper simulation model for CCU2D | Miodrag Milanovic | 2023-04-06 | 1 | -15/+35 |
| * | Generate TRELLIS_DPR16X4 for lutram | Miodrag Milanovic | 2023-04-06 | 3 | -21/+72 |
| * | machxo2: Initial support for carry chains (CCU2D) | Miodrag Milanovic | 2023-04-06 | 4 | -5/+127 |
| * | Update Xilinx cell definitions, fixes #3699 | Miodrag Milanovic | 2023-03-23 | 3 | -6/+16 |
| * | Start unification effort for machxo2 and ecp5 | Miodrag Milanovic | 2023-03-20 | 4 | -31/+23 |
| * | Add additional iopad_external_pin attributes | Miodrag Milanovic | 2023-03-20 | 1 | -4/+22 |
| * | Add iopad_external_pin to some basic io primitives | Miodrag Milanovic | 2023-03-20 | 2 | -12/+13 |
| * | insert IO buffers for ECP5, off by default | Miodrag Milanovic | 2023-03-20 | 1 | -1/+14 |
| * | ice40: Fix path delay definitions | Stefan Riesenberger | 2023-03-10 | 1 | -14/+14 |
| * | Merge pull request #3688 from pu-cc/gatemate-reginit | N. Engelhardt | 2023-03-01 | 3 | -8/+16 |
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| | * | gatemate: Enable register initialization | Patrick Urban | 2023-02-15 | 3 | -8/+16 |
| * | | Merge pull request #3663 from uis246/master | Miodrag Milanović | 2023-02-28 | 1 | -0/+17 |
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| | * | | gowin: Add new types of oscillator | uis | 2023-02-06 | 1 | -0/+17 |
| * | | | Merge pull request #3652 from martell/elvds | Miodrag Milanović | 2023-02-28 | 1 | -0/+8 |
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| | * | | | gowin: Add support for emulated differential output | martell | 2023-01-29 | 1 | -0/+8 |
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| * | | | fabulous: Add support for mapping carry chains | gatecat | 2023-02-27 | 4 | -2/+93 |
| * | | | Check DREG attribute | Oliver Keszöcze | 2023-02-17 | 1 | -1/+1 |
| * | | | fabulous: Add CLK to BRAM interface primitives | gatecat | 2023-02-16 | 1 | -3/+3 |
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| * | | gatemate: Update CC_PLL parameters | Patrick Urban | 2023-02-14 | 1 | -0/+3 |
| * | | gatemate: Add CC_USR_RSTN primitive | Patrick Urban | 2023-02-14 | 1 | -0/+6 |
| * | | gatemate: Ensure compatibility of LVDS ports with VHDL | Patrick Urban | 2023-02-14 | 1 | -12/+12 |
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| * | Merge pull request #3630 from yrabbit/gw1n4c-pll | Miodrag Milanović | 2023-01-18 | 1 | -0/+47 |
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| | * | gowin: add a new type of PLL - PLLVR | YRabbit | 2023-01-11 | 1 | -0/+47 |
| * | | Merge pull request #3537 from jix/xprop | Jannis Harder | 2023-01-11 | 2 | -10/+60 |
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| | * | Add bitwise `$bweqx` and `$bwmux` cells | Jannis Harder | 2022-11-30 | 2 | -1/+38 |
| | * | simlib: Use optional SIMLIB_GLOBAL_CLOCK to define a global clock signal | Jannis Harder | 2022-11-30 | 1 | -2/+8 |
| | * | simlib: Silence iverilog warning for `$lut` | Jannis Harder | 2022-11-30 | 1 | -1/+1 |
| | * | simlib: Fix wide $bmux and avoid iverilog warnings | Jannis Harder | 2022-11-30 | 1 | -2/+2 |
| | * | satgen, simlib: Consistent x-propagation for `$pmux` cells | Jannis Harder | 2022-11-30 | 1 | -4/+11 |
| * | | nexus: Fix BRAM write enable in PDP mode | gatecat | 2023-01-04 | 1 | -2/+2 |
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| * | fabulous: Allow adding extra custom prims and map rules | gatecat | 2022-11-17 | 1 | -0/+32 |
| * | fabulous: improvements to the pass | gatecat | 2022-11-17 | 6 | -139/+199 |
| * | fabulous: Unify and update primitives | gatecat | 2022-11-17 | 3 | -852/+356 |
| * | Introduce RegFile mappings | TaoBi22 | 2022-11-17 | 4 | -2/+95 |
| * | Replace synth call with components, reintroduce flags and correct vpr flag im... | TaoBi22 | 2022-11-17 | 1 | -4/+76 |
| * | Reorder operations to load in primitive library before hierarchy pass | TaoBi22 | 2022-11-17 | 1 | -5/+6 |
| * | Add plib flag to specify custom primitive library path | TaoBi22 | 2022-11-17 | 1 | -2/+14 |
| * | Remove flattening from FABulous pass | TaoBi22 | 2022-11-17 | 1 | -11/+2 |
| * | Remove ALL currently unused flags (some to be reintroduced later and passed t... | TaoBi22 | 2022-11-17 | 1 | -82/+3 |
| * | Add synth_fabulous ScriptPass | TaoBi22 | 2022-11-17 | 8 | -0/+1282 |
| * | simlib: Simplify recently changed $mux model | Jannis Harder | 2022-10-28 | 1 | -4/+2 |
| * | Merge pull request #3526 from jix/mux-simlib-eval | Jannis Harder | 2022-10-24 | 1 | -4/+1 |
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| | * | Consistent $mux undef handling | Jannis Harder | 2022-10-24 | 1 | -4/+1 |
| * | | Add smtmap.v describing the smt2 backend's behavior for undef bits | Jannis Harder | 2022-10-20 | 2 | -0/+29 |
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