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| author | Patrick Urban <patrick.urban@colognechip.com> | 2023-02-14 07:58:59 +0100 |
|---|---|---|
| committer | myrtle <gatecat@ds0.me> | 2023-02-14 12:02:41 +0100 |
| commit | 6a7d5257cdcf81a1cf36622fc0b03e125f462b3d (patch) | |
| tree | 5c7aed5184f992eaaaca7986d632b49341201499 /techlibs | |
| parent | 4cb27b1a3ac24cb6367533ac63cfc63123fab2de (diff) | |
| download | yosys-6a7d5257cdcf81a1cf36622fc0b03e125f462b3d.tar.gz yosys-6a7d5257cdcf81a1cf36622fc0b03e125f462b3d.tar.bz2 yosys-6a7d5257cdcf81a1cf36622fc0b03e125f462b3d.zip | |
gatemate: Add CC_USR_RSTN primitive
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/gatemate/cells_bb.v | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/techlibs/gatemate/cells_bb.v b/techlibs/gatemate/cells_bb.v index f6fe6a3e1..9185af0b4 100644 --- a/techlibs/gatemate/cells_bb.v +++ b/techlibs/gatemate/cells_bb.v @@ -123,6 +123,12 @@ module CC_CFG_CTRL( );
endmodule
+(* blackbox *) (* keep *)
+module CC_USR_RSTN (
+ output USR_RSTN
+);
+endmodule
+
(* blackbox *)
module CC_FIFO_40K (
output A_ECC_1B_ERR,
|