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* Merge pull request #3734 from jix/fix_unbased_unsized_constHEADmasterJannis Harder2023-04-243-1/+36
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| * verilog: Fix const eval of unbased unsized constantsJannis Harder2023-04-203-1/+36
* | Bump versiongithub-actions[bot]2023-04-231-1/+1
* | ABC9: Cell Port Bug Patch (#3670)Benjamin Barzen2023-04-224-2/+26
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* Bump versiongithub-actions[bot]2023-04-191-1/+1
* Merge pull request #3732 from hzeller/20230417-remote-statement-no-effectJannis Harder2023-04-181-2/+0
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| * Remove a statement without effect.Henner Zeller2023-04-171-2/+0
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* Bump versiongithub-actions[bot]2023-04-151-1/+1
* Next dev cycleMiodrag Milanovic2023-04-142-2/+5
* Release version 0.28Miodrag Milanovic2023-04-142-3/+14
* Merge pull request #3727 from YosysHQ/micko/pll_bramMiodrag Milanović2023-04-145-124/+325
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| * Add PLL and EBR related primitivesMiodrag Milanovic2023-04-105-124/+325
* | Bump versiongithub-actions[bot]2023-04-131-1/+1
* | fabulous: Add support for LUT6sgatecat2023-04-122-1/+38
* | gowin: Add serialization/deserialization primitivesYRabbit2023-04-121-0/+244
* | Bump versiongithub-actions[bot]2023-04-071-1/+1
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* ecp5: Remove TRELLIS_SLICE and add TRELLIS_COMB modelgatecat2023-04-061-160/+30
* add additional dff and lutram testsMiodrag Milanovic2023-04-062-0/+57
* add test for CCU2DMiodrag Milanovic2023-04-061-0/+10
* Add more DFF typesMiodrag Milanovic2023-04-065-48/+102
* Added proper simulation model for CCU2DMiodrag Milanovic2023-04-061-15/+35
* Generate TRELLIS_DPR16X4 for lutramMiodrag Milanovic2023-04-063-21/+72
* machxo2: Initial support for carry chains (CCU2D)Miodrag Milanovic2023-04-064-5/+127
* Bump versiongithub-actions[bot]2023-03-241-1/+1
* Update Xilinx cell definitions, fixes #3699Miodrag Milanovic2023-03-233-6/+16
* Bump versiongithub-actions[bot]2023-03-211-1/+1
* Merge pull request #3708 from jix/void_funcJannis Harder2023-03-203-1/+56
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| * verilog: Support void functionsJannis Harder2023-03-203-1/+56
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* Update testsMiodrag Milanovic2023-03-207-16/+16
* Start unification effort for machxo2 and ecp5Miodrag Milanovic2023-03-204-31/+23
* Add additional iopad_external_pin attributesMiodrag Milanovic2023-03-201-4/+22
* Add iopad_external_pin to some basic io primitivesMiodrag Milanovic2023-03-202-12/+13
* insert IO buffers for ECP5, off by defaultMiodrag Milanovic2023-03-201-1/+14
* Bump versiongithub-actions[bot]2023-03-161-1/+1
* Merge pull request #3704 from jix/enum_valuesMiodrag Milanović2023-03-153-34/+89
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| * verific: Fix enum_values support and signed attribute valuesJannis Harder2023-03-153-34/+89
* | Bump versiongithub-actions[bot]2023-03-111-1/+1
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* Merge pull request #3682 from daglem/struct-member-out-of-boundsJannis Harder2023-03-108-22/+145
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| * Added test for dynamic indexing within struct membersDag Lem2023-03-082-0/+71
| * Index struct/union members within corresponding wire chunksDag Lem2023-03-055-33/+69
| * Out of bounds checking for struct/union membersDag Lem2023-02-193-6/+22
* | ice40: Fix path delay definitionsStefan Riesenberger2023-03-101-14/+14
* | Bump versiongithub-actions[bot]2023-03-071-1/+1
* | Merge pull request #3684 from YosysHQ/fix-GIT_REVN. Engelhardt2023-03-061-1/+1
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| * | Makefile: fix GIT_REV extraction if Yosys is built as submodule.Catherine2023-03-011-1/+1
* | | Next dev cycleMiodrag Milanovic2023-03-062-2/+5
* | | Release version 0.27Miodrag Milanovic2023-03-062-3/+14
* | | Bump versiongithub-actions[bot]2023-03-021-1/+1
* | | Merge pull request #3690 from whitequark/smtbmc-help-optN. Engelhardt2023-03-011-4/+13
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| * | | yosys-smtbmc: support -h/--help (and exit with code 0).Catherine2023-02-271-4/+13