iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth_xilinx: Use opt_dff.	Marcelina Kościelnicka	2020-07-30	1	-285/+48
*	Cleanup use of hard-coded default parameters in light of #1945	Eddie Hung	2020-04-22	1	-9/+9
*	xilinx_dsp: another typo; move xilinx specific test	Eddie Hung	2020-01-17	1	-1/+1
*	Consistency	Eddie Hung	2020-01-17	1	-1/+1
*	xilinx_dsp: add parameter defaults	Eddie Hung	2020-01-17	1	-7/+7
*	Check for either sign or zero extension for postAdd packing	Eddie Hung	2019-11-26	1	-3/+3
*	Fix #1462, #1480.	Marcin Kościelnicki	2019-11-19	1	-5/+7
*	Add comment on why we have to match for clock-enable/reset muxes	Eddie Hung	2019-10-05	1	-1/+4
*	Add note on pattern detector	Eddie Hung	2019-10-05	1	-3/+7
*	Restore optimisation for sigM.empty()	Eddie Hung	2019-10-04	1	-1/+4
*	Retry on fixing TODOs	Eddie Hung	2019-10-04	1	-8/+1
*	Revert "Fix TODOs"	Eddie Hung	2019-10-04	1	-0/+15
*	More comments, cleanup	Eddie Hung	2019-10-04	1	-31/+75
*	Fix TODOs	Eddie Hung	2019-10-04	1	-15/+0
*	Add comments for xilinx_dsp	Eddie Hung	2019-10-04	1	-2/+91
*	Fix xilinx_dsp for unsigned extensions	Eddie Hung	2019-10-04	1	-1/+3
*	Do not die if DSP48E1.P has no users (would otherwise get 'clean'-ed)	Eddie Hung	2019-09-25	1	-1/+5
*	Reject if (* init *) present	Eddie Hung	2019-09-25	1	-0/+3
*	Rework xilinx_dsp postAdd for new wreduce call	Eddie Hung	2019-09-25	1	-3/+3
*	Call 'wreduce' after mul2dsp to avoid unextend()	Eddie Hung	2019-09-25	1	-5/+4
*	Separate out CREG packing into new pattern, to avoid conflict with PREG	Eddie Hung	2019-09-23	1	-24/+6
*	Use new port() overload once more	Eddie Hung	2019-09-23	1	-2/+2
*	Use new port/param overload in pmg	Eddie Hung	2019-09-20	1	-4/+4
*	Cleanup xilinx_dsp	Eddie Hung	2019-09-20	1	-1/+1
*	Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT	Eddie Hung	2019-09-20	1	-1/+1
*	Add an index	Eddie Hung	2019-09-19	1	-0/+2
*	Do not perform width-checks for DSP48E1 which is much more complicated	Eddie Hung	2019-09-19	1	-11/+0
*	Cleanup xilinx_dsp too	Eddie Hung	2019-09-19	1	-37/+28
*	Cleanup	Eddie Hung	2019-09-19	1	-8/+4
*	Check overflow condition is power of 2 without using int32	Eddie Hung	2019-09-18	1	-2/+2
*	Add support for overflow using pattern detector	Eddie Hung	2019-09-18	1	-1/+12
*	Separate dffrstmux from dffcemux, fix typos	Eddie Hung	2019-09-18	1	-20/+32
*	Add support for A1 and B1 registers	Eddie Hung	2019-09-11	1	-5/+65
*	Rename {A,B} -> {A2,B2}	Eddie Hung	2019-09-11	1	-19/+20
*	Make unextend a udata	Eddie Hung	2019-09-11	1	-3/+2
*	Add support for A/B/C/D/AD reset	Eddie Hung	2019-09-11	1	-56/+103
*	Add support for RSTM	Eddie Hung	2019-09-11	1	-64/+88
*	Only pack out registers if \init is zero or x; then remove \init from PREG	Eddie Hung	2019-09-10	1	-4/+8
*	Add support for RSTP	Eddie Hung	2019-09-10	1	-22/+58
*	enpol -> cepol	Eddie Hung	2019-09-10	1	-46/+48
*	d?ffmux -> d?ffcemux	Eddie Hung	2019-09-10	1	-34/+33
*	Refactor MREG and PREG to out_dffe subpattern	Eddie Hung	2019-09-10	1	-155/+122
*	Only trim sigM if USE_MULT; only look for ffM then too	Eddie Hung	2019-09-09	1	-9/+13
*	Rename	Eddie Hung	2019-09-09	1	-27/+27
*	Oops	Eddie Hung	2019-09-09	1	-2/+1
*	Tidy up	Eddie Hung	2019-09-09	1	-6/+5
*	Refactor using subpattern in_dffe	Eddie Hung	2019-09-09	1	-240/+146
*	Pack CREG	Eddie Hung	2019-09-06	1	-19/+70
*	Use unextend lambda	Eddie Hung	2019-09-06	1	-19/+18
*	Fix ffP just like ffPmux	Eddie Hung	2019-09-06	1	-4/+4