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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-06 18:40:11 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-06 18:40:11 -0700 |
| commit | 6a9205280f4c574db3a779e2f057e8649fe35356 (patch) | |
| tree | 89dae2b7b2283f6a10d0ad999f2aabd4c7fedde4 /passes/pmgen/xilinx_dsp.pmg | |
| parent | b69512a5b90a854a96b6e25bf4ccc567a7f89ad2 (diff) | |
| download | yosys-6a9205280f4c574db3a779e2f057e8649fe35356.tar.gz yosys-6a9205280f4c574db3a779e2f057e8649fe35356.tar.bz2 yosys-6a9205280f4c574db3a779e2f057e8649fe35356.zip | |
Use unextend lambda
Diffstat (limited to 'passes/pmgen/xilinx_dsp.pmg')
| -rw-r--r-- | passes/pmgen/xilinx_dsp.pmg | 37 |
1 files changed, 18 insertions, 19 deletions
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg index 7be841ff3..3aab807bd 100644 --- a/passes/pmgen/xilinx_dsp.pmg +++ b/passes/pmgen/xilinx_dsp.pmg @@ -1,5 +1,6 @@ pattern xilinx_dsp +state <std::function<SigSpec(const SigSpec&, bool)>> unextend state <SigBit> clock state <SigSpec> sigA sigffAmuxY sigB sigffBmuxY sigC sigD sigffDmuxY sigM sigP state <IdString> postAddAB postAddMuxAB @@ -10,29 +11,26 @@ match dsp select dsp->type.in(\DSP48E1) endmatch -code sigA sigffAmuxY sigB sigffBmuxY sigD sigM - sigA = port(dsp, \A); - int i; - for (i = GetSize(sigA)-1; i > 0; i--) - if (sigA[i] != sigA[i-1]) - break; - // Do not remove non-const sign bit - if (sigA[i].wire) - ++i; - sigA.remove(i, GetSize(sigA)-i); - sigB = port(dsp, \B); - for (i = GetSize(sigB)-1; i > 0; i--) - if (sigB[i] != sigB[i-1]) - break; - // Do not remove non-const sign bit - if (sigB[i].wire) - ++i; - sigB.remove(i, GetSize(sigB)-i); - +code unextend sigA sigffAmuxY sigB sigffBmuxY sigC sigD sigffDmuxY sigM + unextend = [](const SigSpec &sig, bool keep_sign) { + int i; + for (i = GetSize(sig)-1; i > 0; i--) + if (sig[i] != sig[i-1]) + break; + // Do not remove non-const sign bit + if (!keep_sign && sig[i].wire) + ++i; + return sig.extract(0, i); + }; + sigA = unextend(port(dsp, \A), false); + sigB = unextend(port(dsp, \B), false); + + sigC = dsp->connections_.at(\C, SigSpec()); sigD = dsp->connections_.at(\D, SigSpec()); SigSpec P = port(dsp, \P); // Only care about those bits that are used + int i; for (i = 0; i < GetSize(P); i++) { if (nusers(P[i]) <= 1) break; @@ -44,6 +42,7 @@ code sigA sigffAmuxY sigB sigffBmuxY sigD sigM sigffAmuxY = SigSpec(); sigffBmuxY = SigSpec(); + sigffDmuxY = SigSpec(); endcode match ffAD |