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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-06 15:51:21 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-06 15:51:21 -0700 |
| commit | b69512a5b90a854a96b6e25bf4ccc567a7f89ad2 (patch) | |
| tree | aa4564d980585e4c7ac52083ff3e22b124bfd93c /passes/pmgen/xilinx_dsp.pmg | |
| parent | 5344bfe637e0c8d527f94f615e4ed8704c358cf8 (diff) | |
| download | yosys-b69512a5b90a854a96b6e25bf4ccc567a7f89ad2.tar.gz yosys-b69512a5b90a854a96b6e25bf4ccc567a7f89ad2.tar.bz2 yosys-b69512a5b90a854a96b6e25bf4ccc567a7f89ad2.zip | |
Fix ffP just like ffPmux
Diffstat (limited to 'passes/pmgen/xilinx_dsp.pmg')
| -rw-r--r-- | passes/pmgen/xilinx_dsp.pmg | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg index 9e4738c88..7be841ff3 100644 --- a/passes/pmgen/xilinx_dsp.pmg +++ b/passes/pmgen/xilinx_dsp.pmg @@ -440,10 +440,10 @@ endmatch match ffP if !ffP_enable if param(dsp, \PREG).as_int() == 0 - // If ffMmux, input net must have exactly three users: ffMmux, ffM and ffP - if !ffMmux || nusers(sigP) == 3 - // Otherwise input net must have exactly two users: dsp and ffP - if ffMmux || nusers(sigP) == 2 + // If ffMmux and no postAdd new-value net must have exactly three users: ffMmux, ffM and ffPmux + if !ffMmux || postAdd || nusers(sigP) == 3 + // Otherwise new-value net must have exactly two users: dsp and ffPmux + if (ffMmux && !postAdd) || nusers(sigP) == 2 select ffP->type.in($dff) // DSP48E1 does not support clock inversion |