Commit message (Collapse) | Author | Age | Files | Lines | |
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* | set undriven pads to zero | Pepijn de Vos | 2019-09-04 | 1 | -2/+2 |
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* | fix tcl script | Pepijn de Vos | 2019-09-04 | 1 | -2/+1 |
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* | add broken TCL run script | Pepijn de Vos | 2019-09-04 | 2 | -0/+18 |
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* | Add demonstration of breakage | Pepijn de Vos | 2019-09-04 | 1 | -0/+1 |
| | | | | Unused outputs lead to undriven buffers, which lead to syntax errors. | ||||
* | Update example for GW1NR-9 | Pepijn de Vos | 2019-09-04 | 4 | -47/+28 |
| | | | | This uses the Trenz TEC0117 on Gowin IDE 1.8.4 | ||||
* | Add clock buffer insertion pass, improve iopadmap. | Marcin KoĆcielnicki | 2019-08-13 | 1 | -2/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few new attributes are defined for use in cell libraries: - iopad_external_pin: marks PAD cell's external-facing pin. Pad insertion will be skipped for ports that are already connected to such a pin. - clkbuf_sink: marks an input pin as a clock pin, requesting clock buffer insertion. - clkbuf_driver: marks an output pin as a clock buffer output pin. Clock buffer insertion will be skipped for nets that are already driven by such a pin. All three are module attributes that should be set to a comma-separeted list of pin names. Clock buffer insertion itself works as follows: 1. All cell ports, starting from bottom up, can be marked as clock sinks (requesting clock buffer insertion) or as clock buffer outputs. 2. If a wire in a given module is driven by a cell port that is a clock buffer output, it is in turn also considered a clock buffer output. 3. If an input port in a non-top module is connected to a clock sink in a contained cell, it is also in turn considered a clock sink. 4. If a wire in a module is driven by a non-clock-buffer cell, and is also connected to a clock sink port in a contained cell, a clock buffer is inserted in this module. 5. For the top module, a clock buffer is also inserted on input ports connected to clock sinks, optionally with a special kind of input PAD (such as IBUFG for Xilinx). 6. Clock buffer insertion on a given wire is skipped if the clkbuf_inhibit attribute is set on it. | ||||
* | Add a simple example for Spartan 6 | Marcin KoĆcielnicki | 2019-07-24 | 5 | -0/+47 |
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* | Added cell_stats example | Benedikt Tutzer | 2019-04-03 | 4 | -478/+54 |
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* | Merge remote-tracking branch 'origin/master' into feature/python_bindings | Benedikt Tutzer | 2019-03-28 | 16 | -1/+215 |
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| * | Merge pull request #856 from kprasadvnsi/master | Clifford Wolf | 2019-03-07 | 6 | -10/+12 |
| |\ | | | | | | | examples/anlogic/ now also output the SVF file. | ||||
| | * | examples/anlogic/ now also output the SVF file. | Kali Prasad | 2019-03-06 | 6 | -10/+12 |
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| * | | Refactor SF2 iobuf insertion, Add clkint insertion | Clifford Wolf | 2019-03-06 | 1 | -1/+1 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Improve igloo2 example | Clifford Wolf | 2019-03-05 | 1 | -2/+3 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Improve igloo2 example | Clifford Wolf | 2019-03-05 | 2 | -2/+54 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Improvements in SF2 flow and demo | Clifford Wolf | 2019-03-05 | 2 | -1/+2 |
| |/ | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Improve igloo2 exmaple | Clifford Wolf | 2019-03-05 | 4 | -8/+16 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add missing newline | Clifford Wolf | 2019-03-05 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Added examples/anlogic/ | Kali Prasad | 2019-03-04 | 7 | -0/+55 |
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| * | Improve igloo2 example | Clifford Wolf | 2019-03-03 | 2 | -3/+10 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Update igloo2 example to Libero v12.0 | Clifford Wolf | 2019-03-03 | 2 | -6/+5 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Cleanups in igloo2 example design | Clifford Wolf | 2019-01-17 | 6 | -7/+4 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add SF2 IO buffer insertion | Clifford Wolf | 2019-01-17 | 2 | -2/+3 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Improve Igloo2 example | Clifford Wolf | 2019-01-17 | 8 | -22/+41 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Improve igloo2 example | Clifford Wolf | 2019-01-08 | 4 | -5/+29 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add skeleton Yosys-Libero igloo2 example project | Clifford Wolf | 2019-01-05 | 5 | -0/+44 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #591 from hzeller/virtual-override | Clifford Wolf | 2018-08-15 | 1 | -1/+1 |
| |\ | | | | | | | Consistent use of 'override' for virtual methods in derived classes. | ||||
| | * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
| * | | fix basys3 example | japm48 | 2018-07-22 | 2 | -0/+4 |
| |/ | | | | | | | | | | | | | Added `CONFIG_VOLTAGE` and `CFGBVS` to constraints file to avoid warning `DRC 23-20`. Added `open_hw` needed for programming. | ||||
* / | Added sample code for python-api | Benedikt Tutzer | 2018-12-11 | 3 | -0/+479 |
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* | Update examples/cmos/counter.ys to use "synth" command | Clifford Wolf | 2018-05-30 | 1 | -5/+5 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add smtbmc support for exist-forall problems | Clifford Wolf | 2018-02-23 | 3 | -2/+23 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 1 | -1/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Fixed the -vout flag to -vqm in examples/intel directory | dh73 | 2017-11-14 | 4 | -4/+4 |
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* | Add timing constraints to osu035 example | Clifford Wolf | 2017-10-10 | 3 | -2/+4 |
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* | Add examples/osu035 | Clifford Wolf | 2017-05-23 | 4 | -0/+30 |
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* | Replace CRLF line endings with LF in de2i.qsf (quartus example) | Clifford Wolf | 2017-04-12 | 1 | -1098/+1098 |
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* | Squelch trailing whitespace | Larry Doolittle | 2017-04-12 | 6 | -31/+31 |
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* | Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs | dh73 | 2017-04-05 | 17 | -0/+1287 |
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* | Added $assert/$assume support to AIGER back-end | Clifford Wolf | 2016-12-03 | 2 | -3/+3 |
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* | Added examples/aiger/ | Clifford Wolf | 2016-12-01 | 4 | -0/+53 |
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* | Progress in examples/gowin/ | Clifford Wolf | 2016-11-08 | 5 | -21/+95 |
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* | Added examples/gowin/ | Clifford Wolf | 2016-11-07 | 6 | -0/+57 |
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* | Added $anyseq cell type | Clifford Wolf | 2016-10-14 | 1 | -1/+2 |
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* | yosys-smtbmc meminit support | Clifford Wolf | 2016-09-08 | 3 | -2/+29 |
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* | Improvements in assertpmux | Clifford Wolf | 2016-09-07 | 3 | -2/+25 |
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* | Made examples/smtbmc/demo1.v more interesting | Clifford Wolf | 2016-09-02 | 1 | -1/+1 |
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* | Added $anyconst support to yosys-smtbmc | Clifford Wolf | 2016-08-30 | 3 | -1/+29 |
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* | Made "write_smt2 -bv -mem" default, added "write_smt2 -nobv -nomem" | Clifford Wolf | 2016-08-30 | 1 | -4/+4 |
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* | Removed $predict again | Clifford Wolf | 2016-08-28 | 1 | -1/+0 |
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* | Added smtc "final" statement | Clifford Wolf | 2016-08-27 | 4 | -2/+36 |
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