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| author | japm48 <japm48@users.noreply.github.com> | 2018-07-22 22:29:31 +0200 |
|---|---|---|
| committer | japm48 <japm48@users.noreply.github.com> | 2018-07-22 22:29:31 +0200 |
| commit | beedaa58561eb7cabf24e0d267beb77d5c78ef1d (patch) | |
| tree | fb824f65a86f56b1922416ce3f3d95187007d095 /examples | |
| parent | e275692e84c935d0cdf42c2a4adf7ac949a88132 (diff) | |
| download | yosys-beedaa58561eb7cabf24e0d267beb77d5c78ef1d.tar.gz yosys-beedaa58561eb7cabf24e0d267beb77d5c78ef1d.tar.bz2 yosys-beedaa58561eb7cabf24e0d267beb77d5c78ef1d.zip | |
fix basys3 example
Added `CONFIG_VOLTAGE` and `CFGBVS` to constraints file
to avoid warning `DRC 23-20`.
Added `open_hw` needed for programming.
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/basys3/example.xdc | 3 | ||||
| -rw-r--r-- | examples/basys3/run_prog.tcl | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/examples/basys3/example.xdc b/examples/basys3/example.xdc index c1fd0e925..8cdaa1996 100644 --- a/examples/basys3/example.xdc +++ b/examples/basys3/example.xdc @@ -19,3 +19,6 @@ set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN L1 } [get_ports {LD[15]}] create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property CFGBVS VCCO [current_design] + diff --git a/examples/basys3/run_prog.tcl b/examples/basys3/run_prog.tcl index d711af840..b078ad511 100644 --- a/examples/basys3/run_prog.tcl +++ b/examples/basys3/run_prog.tcl @@ -1,3 +1,4 @@ +open_hw connect_hw_server open_hw_target [lindex [get_hw_targets] 0] set_property PROGRAM.FILE example.bit [lindex [get_hw_devices] 0] |