| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add to changelog | Miodrag Milanovic | 2020-02-17 | 1 | -0/+1 |
| * | Merge branch 'master' into master | Rodrigo A. Melo | 2020-02-03 | 1 | -0/+1 |
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| | * | Add opt_lut_ins pass. (#1673) | Marcelina Kościelnicka | 2020-02-03 | 1 | -0/+1 |
| * | | Merge branch 'master' of https://github.com/YosysHQ/yosys | Rodrigo Alejandro Melo | 2020-02-03 | 1 | -1/+3 |
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| | * | Update CHANGELOG and README | David Shah | 2020-02-02 | 1 | -0/+1 |
| * | | Removed a line jump into the CHANGELOG | Rodrigo Alejandro Melo | 2020-02-01 | 1 | -3/+2 |
| * | | $readmem[hb] file inclusion is now relative to the Verilog file | Rodrigo Alejandro Melo | 2020-01-31 | 1 | -1/+2 |
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| * | Add 'abc9 -dff' to CHANGELOG | Eddie Hung | 2020-01-02 | 1 | -0/+1 |
| * | Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md | Eddie Hung | 2019-12-30 | 1 | -0/+1 |
| * | Add "scratchpad" to CHANGELOG | Eddie Hung | 2019-12-18 | 1 | -0/+1 |
| * | xilinx: Add xilinx_dffopt pass (#1557) | Marcin Kościelnicki | 2019-12-18 | 1 | -0/+1 |
| * | xilinx: Improve flip-flop handling. | Marcin Kościelnicki | 2019-12-18 | 1 | -0/+2 |
| * | Update CHANGELOG and README | David Shah | 2019-11-22 | 1 | -0/+2 |
| * | Add "check -mapped" | Clifford Wolf | 2019-10-02 | 1 | -0/+1 |
| * | synth_xilinx: Support latches, remove used-up FF init values. | Marcin Kościelnicki | 2019-09-30 | 1 | -0/+1 |
| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-20 | 1 | -0/+2 |
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| | * | Update CHANGELOG | Clifford Wolf | 2019-09-20 | 1 | -0/+2 |
| * | | Merge remote-tracking branch 'origin/clifford/fix1381' into xc7dsp | Eddie Hung | 2019-09-19 | 1 | -0/+1 |
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| | * | Added extractinv pass | Marcin Kościelnicki | 2019-09-19 | 1 | -0/+1 |
| * | | Add more entries | Eddie Hung | 2019-09-19 | 1 | -0/+1 |
| * | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-12 | 1 | -0/+1 |
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| | * | Add -match-init option to dff2dffs. | Marcin Kościelnicki | 2019-09-11 | 1 | -0/+1 |
| * | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-11 | 1 | -0/+1 |
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| | * | techmap: Add support for extracting init values of ports | Marcin Kościelnicki | 2019-09-07 | 1 | -0/+1 |
| * | | Update CHANGELOG | Eddie Hung | 2019-09-10 | 1 | -0/+5 |
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| * | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl | Eddie Hung | 2019-08-28 | 1 | -0/+5 |
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| | * | Merge branch 'master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-26 | 1 | -11/+107 |
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| | * \ | Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap | Eddie Hung | 2019-08-23 | 1 | -0/+8 |
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| | * | | | minor review fixes | Marcin Kościelnicki | 2019-08-13 | 1 | -2/+4 |
| | * | | | review fixes | Marcin Kościelnicki | 2019-08-13 | 1 | -0/+3 |
| * | | | | Merge branch 'master' into eddie/xilinx_srl | Eddie Hung | 2019-08-26 | 1 | -11/+106 |
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| | * | | | Remove dupe in CHANGELOG, missing end quote | Eddie Hung | 2019-08-26 | 1 | -2/+1 |
| | * | | | Merge tag 'yosys-0.9' | Clifford Wolf | 2019-08-26 | 1 | -10/+106 |
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| | | * | | | Update CHANGELOG | David Shah | 2019-07-26 | 1 | -10/+101 |
| | | * | | | Update CHANGELOG | David Shah | 2019-07-09 | 1 | -0/+1 |
| | | * | | | Add missing CHANGELOG entries | Eddie Hung | 2019-06-28 | 1 | -0/+3 |
| * | | | | | Mention shregmap -tech xilinx is superseded | Eddie Hung | 2019-08-23 | 1 | -1/+1 |
| * | | | | | Merge remote-tracking branch 'origin/clifford/pmgen' into eddie/xilinx_srl | Eddie Hung | 2019-08-23 | 1 | -0/+1 |
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| | * | | | | Add pmgen slices and choices | Clifford Wolf | 2019-08-23 | 1 | -0/+1 |
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| * / | | | Add CHANGELOG entry | Eddie Hung | 2019-08-22 | 1 | -0/+2 |
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| * | | | Merge pull request #1209 from YosysHQ/eddie/synth_xilinx | Eddie Hung | 2019-08-20 | 1 | -0/+4 |
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| | * \ \ | Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx | Eddie Hung | 2019-08-20 | 1 | -1/+8 |
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| | * | | | | Update changelog | Eddie Hung | 2019-07-22 | 1 | -3/+4 |
| | * | | | | Add CHANGELOG entry | Eddie Hung | 2019-07-18 | 1 | -0/+3 |
| * | | | | | Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen | Clifford Wolf | 2019-08-19 | 1 | -0/+3 |
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| | * | | | | Merge branch 'master' into eddie/pr1266_again | whitequark | 2019-08-18 | 1 | -0/+1 |
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| | | * | | | | Add 'opt_share' to CHANGELOG | Eddie Hung | 2019-08-16 | 1 | -0/+1 |
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| | * / | | | Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_ad... | Eddie Hung | 2019-08-12 | 1 | -0/+2 |
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| * / / / | Add doc for pmgen semioptional statement, Add pmgen changes to CHANGELOG | Clifford Wolf | 2019-08-15 | 1 | -0/+1 |
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| * | | | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" | David Shah | 2019-08-10 | 1 | -2/+0 |
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index : iCE40/yosys | |
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