iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Add testcase for $_DFF_[NP][NP][01]_	Eddie Hung	2020-04-13	1	-0/+24
*	opt_expr: Optimize multiplications with low 0 bits in operands.	Marcelina Kościelnicka	2020-04-13	1	-0/+28
*	Add .gitignore to tests/select/	Xiretza	2020-04-12	1	-0/+1
*	Merge pull request #1603 from whitequark/ice40-ram_style	whitequark	2020-04-10	5	-35/+551
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\| *	ecp5: do not map FFRAM if explicitly requested otherwise.	whitequark	2020-04-03	1	-16/+62
\| *	ice40: do not map FFRAM if explicitly requested otherwise.	whitequark	2020-04-03	1	-8/+28
\| *	ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.	whitequark	2020-02-06	3	-5/+305
\| *	ice40: match memory inference attribute values case insensitive.	whitequark	2020-02-06	1	-0/+6
\| *	ice40: add support for both 1364.1 and LSE RAM/ROM attributes.	whitequark	2020-02-06	3	-20/+179
\| *	ice40: remove impossible test.	whitequark	2020-02-06	1	-15/+0
* \|	tests: add a quick plugin test	Eddie Hung	2020-04-09	3	-0/+22
* \|	Merge pull request #1648 from YosysHQ/eddie/cmp2lcu	Eddie Hung	2020-04-03	1	-0/+52
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\| * \|	+/cmp2lcu.v to work efficiently for fully/partially constant inputs	Eddie Hung	2020-04-03	1	-3/+31
\| * \|	Refactor +/cmp2lcu.v into recursive techmap	Eddie Hung	2020-04-03	1	-1/+1
\| * \|	techmap +/cmp2lcu.v for decomposing arithmetic compares to $lcu	Eddie Hung	2020-04-03	1	-0/+24
* \| \|	iopadmap: Fix z assignment to inout port	Marcin Kościelnicki	2020-04-02	1	-1/+9
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* \|	Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor	Eddie Hung	2020-04-01	3	-7/+55
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\| * \|	opt_expr: add failing $xnor test	Eddie Hung	2020-03-20	1	-1/+13
\| * \|	Simplify breaking tests/arch/*/fsm.ys tests	Eddie Hung	2020-03-20	2	-7/+3
\| * \|	opt_expr: add $xor/$xnor/$_XOR_/$_XNOR_ tests	Eddie Hung	2020-03-19	1	-0/+40
* \| \|	Merge pull request #1789 from YosysHQ/eddie/opt_expr_alu	Eddie Hung	2020-04-01	1	-0/+63
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\| * \| \|	opt_expr: add $alu tests	Eddie Hung	2020-03-19	1	-0/+63
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* \| \|	Merge pull request #1848 from YosysHQ/eddie/fix_dynslice	Claire Wolf	2020-04-01	1	-0/+12
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\| * \| \|	Add dynamic slicing Verilog testcase	Eddie Hung	2020-03-31	1	-0/+12
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* \| \|	Merge pull request #1761 from YosysHQ/eddie/opt_merge_speedup	Eddie Hung	2020-03-31	2	-0/+92
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\| * \| \|	opt_merge: speedup	Eddie Hung	2020-03-16	2	-0/+92
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* \| \|	Merge pull request #1811 from PeterCrozier/typedef_scope	N. Engelhardt	2020-03-30	1	-0/+7
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\| * \| \|	Support module/package/interface/block scope for typedef names.	Peter Crozier	2020-03-23	1	-0/+7
* \| \| \|	Add support for SystemVerilog-style `define to Verilog frontend	Rupert Swarbrick	2020-03-27	4	-0/+50
* \| \| \|	Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix	Claire Wolf	2020-03-26	1	-0/+18
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\| * \| \| \|	techmap: Fix cell names with _TECHMAP_REPLACE_.*	Marcin Kościelnicki	2020-03-23	1	-0/+18
* \| \| \| \|	Merge pull request #1763 from boqwxp/issue1762	N. Engelhardt	2020-03-23	5	-0/+19
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\| * \| \| \|	Do not warn on empty selection with prefixed `arg_memb`.	Alberto Gonzalez	2020-03-23	1	-0/+5
\| * \| \| \|	Suppress warnings for empty `select` arguments when `-count` or `-assert-*` o...	Alberto Gonzalez	2020-03-23	1	-0/+2
\| * \| \| \|	Add tests for `select` command warnings.	Alberto Gonzalez	2020-03-23	3	-0/+12
* \| \| \| \|	Merge pull request #1803 from Grazfather/typedef	N. Engelhardt	2020-03-23	7	-25/+26
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\| * \| \| \|	Revert typedef tests to standard grammar.	Peter	2020-03-22	7	-25/+26
* \| \| \| \|	Add test for abc9+mince issue	David Shah	2020-03-20	1	-0/+17
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* \| \| \|	fsm_extract: Initialize celltypes with full design.	Marcin Kościelnicki	2020-03-19	1	-0/+33
* \| \| \|	Merge pull request #1774 from boqwxp/exec	N. Engelhardt	2020-03-19	1	-0/+6
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\| * \| \| \|	Add test for `exec` command.	Alberto Gonzalez	2020-03-16	1	-0/+6
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* / / /	fix argument order for macOS compatibility	N. Engelhardt	2020-03-18	1	-3/+3
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* \| \|	Merge pull request #1759 from zeldin/constant_with_comment_redux	Miodrag Milanović	2020-03-14	2	-0/+24
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\| * \| \|	Add regression tests for new handling of comments in constants	Marcus Comstedt	2020-03-14	2	-0/+24
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* \| \|	Merge pull request #1754 from boqwxp/precise_locations	Miodrag Milanović	2020-03-14	1	-0/+8
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\| * \| \|	verilog: add test	Eddie Hung	2020-03-11	1	-0/+8
* \| \| \|	Added back tests for logger	Miodrag Milanovic	2020-03-13	4	-0/+24
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* \| \|	Merge pull request #1721 from YosysHQ/dave/tribuf-unused	David Shah	2020-03-10	1	-0/+14
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\| * \|	deminout: Don't demote inouts with unused bits	David Shah	2020-03-04	1	-0/+14
* \| \|	Fix partsel expr bit width handling and add test case	Claire Wolf	2020-03-08	1	-0/+4