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Author
Age
Files
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simple_abc9 tests to discard whitebox before write for sim
Eddie Hung
2020-01-23
2
-2
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+3
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Test for (* keep *)-ed abc9_box_id
Eddie Hung
2020-01-23
1
-0
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+16
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abc_box_id -> abc9_box_id in test
Eddie Hung
2020-01-23
1
-1
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+1
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Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung
2020-01-21
5
-0
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+24
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xilinx_dsp: another typo; move xilinx specific test
Eddie Hung
2020-01-17
1
-0
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+0
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ice40_dsp: fix typo
Eddie Hung
2020-01-17
1
-0
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+11
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Add #1644 testcase
Eddie Hung
2020-01-17
2
-0
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+2
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ice40_dsp: add test
Eddie Hung
2020-01-17
1
-0
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+11
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write_xaiger: fix for (* keep *) on flop output
Eddie Hung
2020-01-21
1
-0
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+15
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Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung
2020-01-15
1
-0
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+13
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abc9: aAdd test to check $_NOT_s are absorbed
Eddie Hung
2020-01-15
1
-0
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+12
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Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung
2020-01-14
6
-9
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+29
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Merge pull request #1633 from YosysHQ/eddie/fix_autoname
Eddie Hung
2020-01-14
1
-0
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+19
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autoname: add testcase with $-prefix-ed port
Eddie Hung
2020-01-14
1
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+19
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Merge pull request #1632 from YosysHQ/eddie/fix1630
Eddie Hung
2020-01-14
2
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+2
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Add #1630 testcase
Eddie Hung
2020-01-13
2
-0
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+2
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Merge pull request #1623 from YosysHQ/mmicko/edif_attr
Miodrag Milanović
2020-01-14
3
-9
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+8
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this one is fine
Miodrag Milanovic
2020-01-10
1
-3
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+3
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Fix tests
Miodrag Milanovic
2020-01-10
3
-12
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+11
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abc9: respect (* keep *) on cells
Eddie Hung
2020-01-13
1
-0
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+15
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write_xaiger: add support and test for (* keep *) on wires
Eddie Hung
2020-01-13
1
-0
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+13
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Merge pull request #1620 from YosysHQ/eddie/abc9_scratchpad
Eddie Hung
2020-01-13
1
-0
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+40
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Merge remote-tracking branch 'origin/master' into eddie/abc9_scratchpad
Eddie Hung
2020-01-11
1
-0
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+25
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Add abc9 sanity test
Eddie Hung
2020-01-09
1
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+40
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Add #1626 testcase
Eddie Hung
2020-01-12
1
-0
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+217
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Merge remote-tracking branch 'origin/master' into eddie/abc9_mfs
Eddie Hung
2020-01-07
9
-4
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+196
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Add testcases
Eddie Hung
2020-01-07
2
-0
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+17
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tests/aiger: write Yosys output
Eddie Hung
2020-01-07
1
-2
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+2
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Combine tests to check multiple clock domains
Eddie Hung
2020-01-02
1
-33
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+10
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2020-01-02
10
-11
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+31
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Add some abc9 dff tests
Eddie Hung
2019-12-31
1
-0
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+55
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Add -D DFF_MODE to abc9_map test
Eddie Hung
2019-12-30
1
-4
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+4
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Remove submod changes
Eddie Hung
2019-12-30
1
-102
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+0
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-30
25
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+247
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-20
2
-3
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+35
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-19
21
-66
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+755
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abc9 needs a clean afterwards
Eddie Hung
2019-12-16
1
-2
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+4
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-12
3
-23
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+136
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-12-06
6
-8
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+412
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abc9_map.v to transform INIT=1 to INIT=0
Eddie Hung
2019-12-04
1
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+91
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Merge remote-tracking branch 'origin/eddie/submod_po' into xaig_dff
Eddie Hung
2019-11-27
1
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+31
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Add multiple driver testcase
Eddie Hung
2019-11-27
1
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+31
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-11-27
2
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+82
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Merge remote-tracking branch 'origin/eddie/write_xaiger_improve' into xaig_dff
Eddie Hung
2019-11-27
1
-9
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+0
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Merge remote-tracking branch 'origin/eddie/submod_po' into xaig_dff
Eddie Hung
2019-11-27
1
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+23
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Revert "submod to bitty rather bussy, for bussy wires used as input and output"
Eddie Hung
2019-11-27
1
-2
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+5
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Fix wire width
Eddie Hung
2019-11-26
1
-2
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+2
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Add testcase where \init is copied
Eddie Hung
2019-11-25
1
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+18
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Merge remote-tracking branch 'origin/master' into xaig_dff
Eddie Hung
2019-11-25
5
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+24
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Merge branch 'xaig_dff' of github.com:YosysHQ/yosys into xaig_dff
Eddie Hung
2019-11-23
3
-11
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+11
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