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* ecp5 to use abc_map.v and _unmap.vEddie Hung2019-08-207-14/+89
* Add reference to FD* timingEddie Hung2019-08-201-0/+2
* Remove sequential extensionEddie Hung2019-08-206-359/+17
* Remove SRL* delays from cells_sim.vEddie Hung2019-08-201-5/+3
* LUTMUX -> LUTMUX6Eddie Hung2019-08-201-2/+2
* Cleanup techmap in map_lutsEddie Hung2019-08-201-3/+5
* Move `techmap abc_map.v` into map_lutsEddie Hung2019-08-201-1/+2
* Remove delays from abc_map.vEddie Hung2019-08-201-5/+2
* TypoEddie Hung2019-08-201-1/+1
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-204-16/+19
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| * Merge pull request #1209 from YosysHQ/eddie/synth_xilinxEddie Hung2019-08-204-16/+19
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| | * Merge remote-tracking branch 'origin/master' into eddie/synth_xilinxEddie Hung2019-08-2026-343/+629
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| | * | Update Makefile tooEddie Hung2019-07-181-2/+2
| | * | Work in progress for renaming labels/options in synth_xilinxEddie Hung2019-07-183-14/+17
* | | | Wrap SRL{16,32} tooEddie Hung2019-08-203-7/+98
* | | | Wrap LUTRAMs in order to capture comb/seq behaviourEddie Hung2019-08-205-36/+200
* | | | Add LUTRAM delaysEddie Hung2019-08-201-3/+6
* | | | Remove mapping rulesEddie Hung2019-08-201-33/+0
* | | | Remove -icellsEddie Hung2019-08-201-2/+2
* | | | Use abc_{map,unmap,model}.vEddie Hung2019-08-207-110/+324
* | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-203-6/+6
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| * | | Merge pull request #1304 from YosysHQ/eddie/abc9_refactorEddie Hung2019-08-203-19/+41
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| | * | Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithroEddie Hung2019-08-193-6/+6
* | | | Add arrival times for SRL outputsEddie Hung2019-08-191-3/+5
* | | | Add BRAM arrival timesEddie Hung2019-08-191-8/+10
* | | | Add reference to source of Tclktoq timingEddie Hung2019-08-191-0/+2
* | | | Add 'abc_arrival' attribute for flop outputsEddie Hung2019-08-191-6/+6
* | | | Update box timingsEddie Hung2019-08-191-6/+9
* | | | Move from cell attr to module attrEddie Hung2019-08-191-12/+6
* | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2019-08-197-165/+37
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| * | | Merge branch 'master' into eddie/pr1266_againwhitequark2019-08-181-15/+5
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| | * \ \ Merge pull request #1250 from bwidawsk/masterEddie Hung2019-08-161-15/+5
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| | | * | | techlibs/intel: Clean up MakefileBen Widawsky2019-08-051-15/+5
| * | | | | Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPEREddie Hung2019-08-121-1/+1
| * | | | | Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_ad...Eddie Hung2019-08-126-150/+32
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* | | | | Use attributes instead of paramsEddie Hung2019-08-191-30/+12
* | | | | Merge branch 'eddie/abc9_refactor' into xaig_dffEddie Hung2019-08-1641-297/+1397
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| * | | | Update abc_* attr in ecp5 and ice40Eddie Hung2019-08-162-11/+21
| * | | | Attach abc_scc_break, abc_carry_{in,out} attr to ports not modulesEddie Hung2019-08-161-8/+20
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| * | | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"David Shah2019-08-106-32/+150
| * | | Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-105-20/+14
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| | * | | substr() -> compare()Eddie Hung2019-08-071-3/+3
| | * | | RTLIL::S{0,1} -> State::S{0,1}Eddie Hung2019-08-071-1/+1
| | * | | Merge remote-tracking branch 'origin/master' into eddie/cleanupEddie Hung2019-08-072-117/+252
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| | * | | | stoi -> atoiEddie Hung2019-08-073-3/+3
| | * | | | Fix spacingEddie Hung2019-08-061-3/+3
| | * | | | Use std::stoi instead of atoi(<str>.c_str())Eddie Hung2019-08-061-1/+1
| | * | | | Make liberal use of IdString.in()Eddie Hung2019-08-061-14/+8
| * | | | | Merge pull request #1270 from YosysHQ/eddie/alu_lcu_docClifford Wolf2019-08-101-8/+36
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| | * | | | | Reformat so it shows up/looks nice when "help $alu" and "help $alu+"Eddie Hung2019-08-091-25/+34