| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Use a dummy box file if none specified | Eddie Hung | 2019-08-28 | 2 | -0/+2 |
| * | Missing newline | Eddie Hung | 2019-08-20 | 1 | -1/+1 |
| * | Reformat so it shows up/looks nice when "help $alu" and "help $alu+" | Eddie Hung | 2019-08-09 | 1 | -25/+34 |
| * | A bit more on where $lcu comes from | Eddie Hung | 2019-08-09 | 1 | -0/+2 |
| * | Add more comments | Eddie Hung | 2019-08-09 | 1 | -4/+18 |
| * | Add a few comments to document $alu and $lcu | Eddie Hung | 2019-08-08 | 1 | -9/+12 |
| * | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs | Clifford Wolf | 2019-08-06 | 1 | -0/+19 |
| * | gen_lut to return correctly sized LUT mask | Eddie Hung | 2019-07-16 | 1 | -1/+1 |
| * | Revert "Add "synth -keepdc" option" | Eddie Hung | 2019-07-09 | 1 | -13/+2 |
| * | Add synth -keepdc option | Eddie Hung | 2019-07-08 | 1 | -2/+13 |
| * | Make doc consistent | Eddie Hung | 2019-06-14 | 1 | -1/+4 |
| * | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-12 | 3 | -2/+182 |
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| | * | Add "wreduce -keepdc", fixes #1016 | Clifford Wolf | 2019-05-20 | 1 | -2/+4 |
| | * | Merge remote-tracking branch 'origin/master' into clifford/specify | Eddie Hung | 2019-05-03 | 1 | -0/+2 |
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| | | * | Run "peepopt" in generic "synth" pass and "synth_ice40" | Clifford Wolf | 2019-04-30 | 1 | -0/+2 |
| | * | | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 1 | -2/+2 |
| | * | | Improve $specrule interface | Clifford Wolf | 2019-04-23 | 1 | -3/+4 |
| | * | | Add $specrule cells for $setup/$hold/$skew specify rules | Clifford Wolf | 2019-04-23 | 1 | -0/+28 |
| | * | | Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nom... | Clifford Wolf | 2019-04-23 | 1 | -70/+70 |
| | * | | Add $specify2 and $specify3 cells to simlib | Clifford Wolf | 2019-04-23 | 1 | -0/+147 |
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| * / | synth to take -abc9 argument | Eddie Hung | 2019-02-20 | 1 | -5/+13 |
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| * | Merge pull request #772 from whitequark/synth_lut | Clifford Wolf | 2019-01-02 | 1 | -6/+40 |
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| | * | synth: add k-LUT mode. | whitequark | 2019-01-02 | 1 | -2/+36 |
| | * | synth: improve script documentation. NFC. | whitequark | 2019-01-02 | 1 | -6/+6 |
| * | | Merge pull request #771 from whitequark/techmap_cmp2lut | Clifford Wolf | 2019-01-02 | 2 | -1/+106 |
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| | * | cmp2lut: new techmap pass. | whitequark | 2019-01-02 | 2 | -1/+106 |
| * | | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 2 | -2/+2 |
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| * | gate2lut: new techlib, for converting Yosys gates to FPGA LUTs. | whitequark | 2018-12-05 | 2 | -0/+88 |
| * | Fix typo. | whitequark | 2018-12-05 | 1 | -2/+2 |
| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 2 | -8/+8 |
| * | Make -nordff the default in "prep" | Clifford Wolf | 2018-05-30 | 1 | -9/+13 |
| * | Add "synth -noshare" | Clifford Wolf | 2018-03-04 | 1 | -2/+11 |
| * | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 1 | -0/+24 |
| * | Fix minor typo in "prep" help message | Clifford Wolf | 2017-12-19 | 1 | -1/+1 |
| * | Add dff2ff.v techmap file | Clifford Wolf | 2017-05-31 | 2 | -0/+15 |
| * | Add $_ANDNOT_ and $_ORNOT_ gates | Clifford Wolf | 2017-05-17 | 1 | -0/+38 |
| * | Add $live and $fair cell types, add support for s_eventually keyword | Clifford Wolf | 2017-02-25 | 1 | -0/+16 |
| * | Add $cover cell type and SVA cover() support | Clifford Wolf | 2017-02-04 | 1 | -0/+8 |
| * | Added $anyseq cell type | Clifford Wolf | 2016-10-14 | 1 | -0/+12 |
| * | Added $global_clock verilog syntax support for creating $ff cells | Clifford Wolf | 2016-10-14 | 2 | -2/+23 |
| * | Added $ff and $_FF_ cell types | Clifford Wolf | 2016-10-12 | 2 | -1/+14 |
| * | Added "prep -nokeepdc" | Clifford Wolf | 2016-09-30 | 1 | -4/+12 |
| * | Added "prep -nomem" | Clifford Wolf | 2016-08-30 | 1 | -6/+16 |
| * | Removed $aconst cell type | Clifford Wolf | 2016-08-30 | 1 | -12/+0 |
| * | Removed $predict again | Clifford Wolf | 2016-08-28 | 1 | -8/+0 |
| * | Added "wreduce -memx" | Clifford Wolf | 2016-08-20 | 1 | -2/+6 |
| * | Added memory_memx pass, "memory -memx", and "prep -memx" | Clifford Wolf | 2016-08-19 | 1 | -2/+17 |
| * | Added $anyconst and $aconst | Clifford Wolf | 2016-07-27 | 1 | -0/+24 |
| * | Added $initstate cell type and vlog function | Clifford Wolf | 2016-07-21 | 1 | -0/+17 |
| * | After reading the SV spec, using non-standard predict() instead of expect() | Clifford Wolf | 2016-07-21 | 1 | -9/+1 |
