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* Added design->rename(module, new_name)Clifford Wolf2015-06-301-0/+7
* Added "rename -top new_name"Clifford Wolf2015-06-171-0/+15
* Fixed cstr_buf for std::string with small string optimizationClifford Wolf2015-06-111-1/+1
* Fixed "avail_parameters" handling in module clone/copyClifford Wolf2015-06-081-0/+2
* Added $eq/$neq -> $logic_not/$reduce_bool optimizationClifford Wolf2015-04-291-0/+15
* Improved attributes API and handling of "src" attributesClifford Wolf2015-04-241-0/+40
* Avoid parameter values with size 0 ($mem cells)Clifford Wolf2015-04-051-5/+5
* Added $_MUX4_, $_MUX8_, and $_MUX16_ cell typesClifford Wolf2015-04-051-0/+4
* Added $assume cell typeClifford Wolf2015-02-261-0/+7
* Added $meminit support to "memory" commandClifford Wolf2015-02-141-0/+1
* Added $meminit cell typeClifford Wolf2015-02-141-0/+9
* Added SigSpec::has_const()Clifford Wolf2015-02-081-0/+12
* Added cell->known(), cell->input(portname), cell->output(portname)Clifford Wolf2015-02-071-0/+34
* Skip blackbox modules in design->selected_modules()Clifford Wolf2015-02-031-3/+5
* Added "equiv_make -blacklist <file> -encfile <file>"Clifford Wolf2015-01-311-0/+15
* Added dict/pool.sort()Clifford Wolf2015-01-241-0/+30
* Progress in equiv_simpleClifford Wolf2015-01-211-2/+5
* Added equiv_make commandClifford Wolf2015-01-191-0/+9
* Added $equiv cell typeClifford Wolf2015-01-191-0/+8
* Optimizing no-op cell->setPort()Clifford Wolf2015-01-171-1/+3
* Removed SigSpec::extend_xx() apiClifford Wolf2015-01-011-18/+0
* added hashlib::mkhash_initClifford Wolf2014-12-301-1/+1
* Added "yosys -X"Clifford Wolf2014-12-291-0/+37
* Added mkhash_xorshift()Clifford Wolf2014-12-291-10/+15
* Added memhasher (yosys -M)Clifford Wolf2014-12-281-0/+3
* Fixed performance bug in object hashingClifford Wolf2014-12-281-5/+5
* Renamed hashmap.h to hashlib.h, some related improvementsClifford Wolf2014-12-281-2/+16
* More dict/pool related changesClifford Wolf2014-12-271-9/+7
* More hashtable finetuningClifford Wolf2014-12-271-2/+2
* Replaced std::unordered_set (nodict) with Yosys::poolClifford Wolf2014-12-261-15/+15
* Replaced std::unordered_map as implementation for Yosys::dictClifford Wolf2014-12-261-11/+11
* Added new_dict (hashmap.h) and re-enabled code coverage countersClifford Wolf2014-12-261-1/+1
* Added Yosys::{dict,nodict,vector} container typesClifford Wolf2014-12-261-23/+77
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-241-8/+7
* Added IdString::destruct_guard hackClifford Wolf2014-12-111-0/+1
* Added bool constructors to SigBit and SigSpecClifford Wolf2014-12-081-0/+10
* Added module->addDffe() and module->addDffeGate()Clifford Wolf2014-12-081-1/+24
* Added $dffe cell typeClifford Wolf2014-12-081-0/+11
* Added $_DFFE_??_ cell typesClifford Wolf2014-12-081-0/+5
* Added log_warning() APIClifford Wolf2014-11-091-3/+3
* Added support for $readmemh/$readmembClifford Wolf2014-10-261-1/+1
* Fixed various VS warningsClifford Wolf2014-10-181-2/+2
* Various win32 / vs build fixesClifford Wolf2014-10-171-1/+1
* Fixed RTLIL::SigSpec::parse() for out-of-range bit- and part-selectsClifford Wolf2014-10-161-1/+8
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-101-29/+29
* Added $_BUF_ cell typeClifford Wolf2014-10-031-0/+1
* Initialize RTLIL::Const from std::vector<bool>Clifford Wolf2014-09-191-0/+7
* Fixed monitor notifications for removed cellClifford Wolf2014-09-141-0/+3
* Added $lcu cell typeClifford Wolf2014-09-081-0/+14
* Added "$fa" cell typeClifford Wolf2014-09-081-0/+15
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