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* Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-101-2/+2
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| * substr() -> compare()Eddie Hung2019-08-071-2/+2
| * stoi -> atoiEddie Hung2019-08-071-1/+1
| * Use std::stoi instead of atoi(<str>.c_str())Eddie Hung2019-08-061-1/+1
* | Automatically prune init attributes in verific front-end, fixes #1237Clifford Wolf2019-08-071-5/+58
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* Call "read_verilog" with -defer from "read"Clifford Wolf2019-07-291-1/+2
* Only support Symbiotic EDA flavored VerificClifford Wolf2019-06-021-0/+8
* Enable Verific flag veri_elaborate_top_level_modules_having_interface_ports, ...Clifford Wolf2019-05-301-0/+3
* For hier_tree::Elaborate() also include SV root modules (bind)Eddie Hung2019-05-031-23/+36
* Fix verific_parameters construction, use attribute to mark top netlistsEddie Hung2019-05-031-7/+11
* WIP -chparam support for hierarchy when verificEddie Hung2019-05-031-10/+15
* verific_import() changes to avoid ElaborateAll()Eddie Hung2019-05-031-15/+38
* Add "read -verific" and "read -noverific"Clifford Wolf2019-03-271-6/+28
* Fix "verific -extnets" for more complex situationsClifford Wolf2019-03-261-15/+71
* Update help message for -chparamEddie Hung2019-03-091-1/+2
* Add -chparam option to verific commandEddie Hung2019-03-091-2/+18
* Improve "read" error msgClifford Wolf2019-02-281-1/+1
* Check if Verific was built with DB_PRESERVE_INITIAL_VALUEClifford Wolf2019-02-241-0/+4
* Improve VerificImporter support for writes to asymmetric memoriesClifford Wolf2019-01-021-22/+35
* Fix VerificImporter asymmetric memories error messageClifford Wolf2019-01-021-1/+1
* Improve src tagging (using names and attrs) of cells and wires in verific fro...Clifford Wolf2018-12-181-99/+159
* Verific updatesClifford Wolf2018-12-061-53/+0
* Set Verific flag vhdl_support_variable_slice=1Clifford Wolf2018-11-091-0/+1
* Improve Verific importer blackbox handlingClifford Wolf2018-10-071-2/+14
* Fix compiler warning in verific.ccClifford Wolf2018-10-051-0/+2
* Add "verific -L <int>" optionClifford Wolf2018-09-041-0/+11
* Add "verific -work" help messageClifford Wolf2018-08-221-0/+7
* Add Verific -work parameterClifford Wolf2018-08-221-8/+18
* Add "verific -set-<severity> <msg_id>.."Clifford Wolf2018-08-161-14/+52
* Verific workaround for VIPER ticket 13851Clifford Wolf2018-08-161-0/+3
* Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-151-5/+5
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| * Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-201-5/+5
* | Verific: Produce errors for instantiating unknown moduleClifford Wolf2018-07-221-0/+3
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* Fix verific -vlog-incdir and -vlog-libdir handlingClifford Wolf2018-07-161-2/+13
* Fix "read -incdir"Clifford Wolf2018-07-161-1/+1
* Add "read -incdir"Clifford Wolf2018-07-161-0/+19
* Add "verific -formal" and "read -formal"Clifford Wolf2018-06-291-7/+15
* Add "read -sv -D" supportClifford Wolf2018-06-281-2/+25
* Add "read -undef"Clifford Wolf2018-06-281-0/+32
* Add YOSYS_NOVERIFIC env variable for temporarily disabling verificClifford Wolf2018-06-221-22/+40
* Add simplified "read" command, enable extnets in implicit Verific importClifford Wolf2018-06-211-0/+84
* Add automatic verific import in hierarchy commandClifford Wolf2018-06-201-0/+53
* Add (* gclk *) attribute supportClifford Wolf2018-06-011-0/+10
* Add comment to VIPER #13453 work-aroundClifford Wolf2018-05-281-0/+1
* Fix Verific handling of single-bit anyseq/anyconst wiresClifford Wolf2018-05-251-2/+4
* Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGEClifford Wolf2018-05-241-1/+1
* Fix verific handling of anyconst/anyseq attributesClifford Wolf2018-05-241-15/+26
* Fix handling of anyconst/anyseq attrs in VHDL code via VerificClifford Wolf2018-05-151-6/+6
* Add PRIM_HDL_ASSERTION support to Verific importerClifford Wolf2018-04-071-3/+19
* Fix handling of $global_clocking in VerificClifford Wolf2018-04-061-1/+7
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