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* Remove now-redundant dff2dffs pass.Marcelina Kościelnicka2020-08-071-50/+0
* peepopt: Remove now-redundant dffmux pattern.Marcelina Kościelnicka2020-08-072-143/+129
* Replace opt_rmdff with opt_dff.Marcelina Kościelnicka2020-08-078-34/+31
* Add dffunmap pass.Marcelina Kościelnicka2020-07-311-0/+100
* opt_expr: Remove -clkinv option, make it the default.Marcelina Kościelnicka2020-07-311-2/+1
* synth_ice40: Use opt_dff.Marcelina Kościelnicka2020-07-301-1/+1
* synth_xilinx: Use opt_dff.Marcelina Kościelnicka2020-07-301-9/+7
* Add opt_dff pass.Marcelina Kościelnicka2020-07-3010-3/+914
* opt_expr: Fix handling of $_XNOR_ cells with A = B.Marcelina Kościelnicka2020-07-291-0/+14
* Merge pull request #2306 from YosysHQ/mwk/equiv_induct-undefclairexen2020-07-281-0/+35
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| * equiv_induct: Fix up assumption for $equiv cells in -undef mode.Marcelina Kościelnicka2020-07-271-0/+35
* | intel_alm: direct M10K instantiationDan Ravensloft2020-07-271-0/+6
* | intel_alm: increase abc9 -WDan Ravensloft2020-07-261-6/+6
* | Merge pull request #2299 from zachjs/arg-loopclairexen2020-07-262-0/+45
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| * Avoid generating wires for function args which are constantZachary Snow2020-07-242-0/+45
* | zinit: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-2/+2
* | clk2fflogic: Support all FF types.Marcelina Kościelnicka2020-07-2419-124/+123
* | satgen: Add support for dffe, sdff, sdffe, sdffce cells.Marcelina Kościelnicka2020-07-242-2/+21
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* Merge pull request #2285 from YosysHQ/mwk/techmap-cellnameclairexen2020-07-231-0/+41
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| * techmap: Add _TECHMAP_CELLNAME_ special parameter.Marcelina Kościelnicka2020-07-211-0/+41
* | intel_alm: add additional ABC9 timingsDan Ravensloft2020-07-231-6/+4
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* Merge pull request #2238 from YosysHQ/mwk/dfflegalize-anlogicMiodrag Milanović2020-07-161-12/+14
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| * anlogic: Use dfflegalize.Marcelina Kościelnicka2020-07-141-12/+14
* | Merge pull request #2257 from antmicro/fix-conflictsclairexen2020-07-154-0/+49
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| * | Revert "Revert PRs #2203 and #2244."Kamil Rakoczy2020-07-104-0/+49
* | | Revert "intel_alm: direct M10K instantiation"Lofty2020-07-131-6/+0
* | | xilinx: Fix srl regression.Marcelina Kościelnicka2020-07-121-0/+41
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* | Revert PRs #2203 and #2244.whitequark2020-07-094-49/+0
* | dfflibmap: Refactor to use dfflegalize internally.Marcelina Kościelnicka2020-07-094-1/+136
* | clkbufmap: improve input pad handling.Marcelina Kościelnicka2020-07-091-0/+79
* | Merge pull request #2244 from antmicro/logicclairexen2020-07-093-0/+21
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| * | Add logic param and integer bad syntax testsKamil Rakoczy2020-07-063-0/+21
* | | clk2fflogic: Consistently treat async control signals as negative hold.Marcelina Kościelnicka2020-07-097-31/+31
* | | dfflegalize: Add special support for const-D latches.Marcelina Kościelnicka2020-07-091-0/+53
* | | gowin: Use dfflegalize.Marcelina Kościelnicka2020-07-062-13/+8
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* | intel_alm: direct M10K instantiationDan Ravensloft2020-07-051-0/+6
* | synth_gowin: ABC9 supportDan Ravensloft2020-07-051-1/+5
* | intel_alm: add Cyclone 10 GX testsDan Ravensloft2020-07-0511-2/+236
* | opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.Marcelina Kościelnicka2020-07-051-0/+16
* | intel_alm: DSP inferenceDan Ravensloft2020-07-051-0/+23
* | synth_intel_alm: Use dfflegalize.Marcelina Kościelnicka2020-07-041-1/+1
* | Improve MISTRAL_FF specify rulesDan Ravensloft2020-07-041-1/+2
* | tests: update fsm.ys resource countEddie Hung2020-07-041-4/+4
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* Merge pull request #2186 from YosysHQ/mwk/dfflegalizeclairexen2020-07-0217-0/+2957
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| * dfflegalize: Add tests.Marcelina Kościelnicka2020-07-0117-0/+2957
* | Merge pull request #2203 from antmicro/fix-grammarclairexen2020-07-011-0/+28
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| * | Add signed/unsigned testsKamil Rakoczy2020-06-261-0/+28
* | | Merge pull request #2179 from splhack/static-castclairexen2020-07-015-0/+80
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| * | | static cast: add testsKazuki Sakamoto2020-06-195-0/+80
* | | | Allow constant function calls in for loops and generate if and caseZachary Snow2020-06-292-0/+76
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