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* Merge pull request #1606 from YosysHQ/eddie/improve_testsEddie Hung2020-01-019-11/+12
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| * Revert insertion of 'reg', leave note behindEddie Hung2020-01-011-1/+2
| * Do not do call equiv_opt when no sim model existsEddie Hung2019-12-312-4/+4
| * Fix warningsEddie Hung2019-12-312-2/+2
| * Call equiv_opt with -multiclock and -assertEddie Hung2019-12-315-5/+5
* | Added a test caseMiodrag Milanovic2020-01-011-0/+19
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* Merge pull request #1589 from YosysHQ/iopad_defaultMiodrag Milanović2019-12-3019-60/+61
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| * Fix new testsMiodrag Milanovic2019-12-283-6/+6
| * Merge remote-tracking branch 'origin/master' into iopad_defaultMiodrag Milanovic2019-12-285-0/+141
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| * | Make test without iopadsMiodrag Milanovic2019-12-2817-51/+51
| * | Revert "Fix xilinx tests, when iopads are default"Miodrag Milanovic2019-12-2816-40/+40
| * | Addressed review commentsMiodrag Milanovic2019-12-211-1/+0
| * | Fix xilinx tests, when iopads are defaultMiodrag Milanovic2019-12-2117-42/+44
* | | Merge pull request #1599 from YosysHQ/eddie/retry_1588Eddie Hung2019-12-303-0/+48
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| * | | Add #1598 testcaseEddie Hung2019-12-273-0/+48
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* / | Update resource countEddie Hung2019-12-281-3/+3
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* | iopadmap: Emit tristate buffers with const OE for some edge cases.Marcin Kościelnicki2019-12-251-0/+23
* | Add DSP cascade testsEddie Hung2019-12-231-0/+89
* | xilinx_dsp: Initial DSP48A/DSP48A1 support.Marcin Kościelnicki2019-12-223-0/+29
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* Merge pull request #1569 from YosysHQ/eddie/fix_1531Eddie Hung2019-12-191-0/+34
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| * Add testcaseEddie Hung2019-12-111-0/+34
* | Merge pull request #1571 from YosysHQ/eddie/fix_1570Eddie Hung2019-12-191-3/+1
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| * | Make SV2017 compliant courtesy of @wsnyderEddie Hung2019-12-121-3/+1
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* | Merge pull request #1572 from nakengelhardt/scratchpad_passEddie Hung2019-12-181-0/+5
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| * | add assert option to scratchpad commandN. Engelhardt2019-12-162-14/+5
| * | add test and make help message more verboseN. Engelhardt2019-12-121-0/+14
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* | tests/xilinx: fix flaky mux testMarcin Kościelnicki2019-12-181-2/+4
* | xilinx: Add xilinx_dffopt pass (#1557)Marcin Kościelnicki2019-12-183-3/+232
* | xilinx: Improve flip-flop handling.Marcin Kościelnicki2019-12-183-11/+12
* | Merge pull request #1574 from YosysHQ/eddie/xilinx_lutramEddie Hung2019-12-1610-53/+228
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| * | Disable RAM16X1D testEddie Hung2019-12-131-17/+17
| * | Remove extraneous synth_xilinx callEddie Hung2019-12-121-2/+0
| * | Add tests for these new modelsEddie Hung2019-12-121-0/+40
| * | Add #1460 testcaseEddie Hung2019-12-121-0/+34
| * | Rename memory tests to lutram, add more xilinx testsEddie Hung2019-12-129-53/+156
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* | Add another testEddie Hung2019-12-161-1/+8
* | Accidentally commented out testsEddie Hung2019-12-161-47/+47
* | Add unconditional match blocks for force RAMEddie Hung2019-12-161-0/+9
* | Merge blockram testsEddie Hung2019-12-163-47/+81
* | Fixing compiler warning/issues. Moving test script to the correct placeDiego H2019-12-161-6/+6
* | Removing fixed attribute value to !ramstyle rulesDiego H2019-12-151-3238/+0
* | Merging attribute rules into a single match block; Adding testsDiego H2019-12-153-0/+3373
* | Renaming BRAM memory tests for the sake of uniformityDiego H2019-12-132-6/+6
* | Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test.Diego H2019-12-121-2/+2
* | Adding a note (TODO) in the memory_params.ys check fileDiego H2019-12-121-0/+2
* | Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1Diego H2019-12-122-0/+90
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* Merge pull request #1545 from YosysHQ/eddie/ice40_wrapcarry_attrEddie Hung2019-12-093-23/+136
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| * unmap $__ICE40_CARRY_WRAPPER in testEddie Hung2019-12-091-1/+21
| * ice40_wrapcarry to really preserve attributes via -unwrap optionEddie Hung2019-12-091-3/+5
| * Drop keep=0 attributes on SB_CARRYEddie Hung2019-12-061-2/+2
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