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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-31 18:40:30 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-31 18:40:30 -0800 |
| commit | 713484fa66da705d2a274cdea590bd4634f48d5d (patch) | |
| tree | 03de7b8a240c78ea8e4540e7b3e2caefee7ede5b /tests | |
| parent | a59016b146e91311324bc87f9a9437d7ff31d9f2 (diff) | |
| download | yosys-713484fa66da705d2a274cdea590bd4634f48d5d.tar.gz yosys-713484fa66da705d2a274cdea590bd4634f48d5d.tar.bz2 yosys-713484fa66da705d2a274cdea590bd4634f48d5d.zip | |
Do not do call equiv_opt when no sim model exists
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/arch/ecp5/macc.ys | 4 | ||||
| -rw-r--r-- | tests/arch/ecp5/mul.ys | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/tests/arch/ecp5/macc.ys b/tests/arch/ecp5/macc.ys index 1863ea4d2..8da8d2f8e 100644 --- a/tests/arch/ecp5/macc.ys +++ b/tests/arch/ecp5/macc.ys @@ -3,8 +3,8 @@ hierarchy -top top proc # Blocked by issue #1358 (Missing ECP5 simulation models) #equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check -equiv_opt -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check -design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +synth_ecp5 +#design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module select -assert-count 1 t:MULT18X18D select -assert-count 4 t:CCU2C diff --git a/tests/arch/ecp5/mul.ys b/tests/arch/ecp5/mul.ys index 2105be52c..f887e9585 100644 --- a/tests/arch/ecp5/mul.ys +++ b/tests/arch/ecp5/mul.ys @@ -3,9 +3,9 @@ hierarchy -top top proc # Blocked by issue #1358 (Missing ECP5 simulation models) #equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check -equiv_opt -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check +synth_ecp5 -design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +#design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module select -assert-count 1 t:MULT18X18D select -assert-none t:MULT18X18D %% t:* %D |