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author | Eddie Hung <eddie@fpgeh.com> | 2020-01-01 09:05:46 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-01 09:05:46 -0800 |
commit | 52fe1e0c44d572b8e1f8881dc0a1e91f7fa93c9c (patch) | |
tree | 812dfdbde1f9bd8d7ae6cd16806d6bf745540719 /tests | |
parent | 3deec51ddcb8690901f7d99958ad71bccd19084f (diff) | |
download | yosys-52fe1e0c44d572b8e1f8881dc0a1e91f7fa93c9c.tar.gz yosys-52fe1e0c44d572b8e1f8881dc0a1e91f7fa93c9c.tar.bz2 yosys-52fe1e0c44d572b8e1f8881dc0a1e91f7fa93c9c.zip |
Revert insertion of 'reg', leave note behind
Diffstat (limited to 'tests')
-rw-r--r-- | tests/arch/ice40/rom.v | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tests/arch/ice40/rom.v b/tests/arch/ice40/rom.v index c4c677c1e..71459fe38 100644 --- a/tests/arch/ice40/rom.v +++ b/tests/arch/ice40/rom.v @@ -2,7 +2,8 @@ Example from: https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071 [p. 74]. */ module top(data, addr); -output reg [3:0] data; +output [3:0] data; // Note: this prompts a Yosys warning, but + // vendor doc does not contain 'reg' input [4:0] addr; always @(addr) begin case (addr) |