| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | tests: zinit for new types | Eddie Hung | 2020-04-14 | 1 | -2/+96 |
| * | dffinit: Avoid setting init parameter to zero-length value. | Marcelina Kościelnicka | 2020-04-14 | 1 | -0/+25 |
| * | zinit: resolve one more comment by @mwkmwkmwk | Eddie Hung | 2020-04-13 | 1 | -1/+8 |
| * | zinit: fix review comments from @mwkmwkmwk | Eddie Hung | 2020-04-13 | 1 | -4/+31 |
| * | tests: zinit on $adff | Eddie Hung | 2020-04-13 | 1 | -19/+18 |
| * | Add testcase for $_DFF_[NP][NP][01]_ | Eddie Hung | 2020-04-13 | 1 | -0/+24 |
| * | Merge pull request #1648 from YosysHQ/eddie/cmp2lcu | Eddie Hung | 2020-04-03 | 1 | -0/+52 |
| |\ |
|
| | * | +/cmp2lcu.v to work efficiently for fully/partially constant inputs | Eddie Hung | 2020-04-03 | 1 | -3/+31 |
| | * | Refactor +/cmp2lcu.v into recursive techmap | Eddie Hung | 2020-04-03 | 1 | -1/+1 |
| | * | techmap +/cmp2lcu.v for decomposing arithmetic compares to $lcu | Eddie Hung | 2020-04-03 | 1 | -0/+24 |
| * | | iopadmap: Fix z assignment to inout port | Marcin Kościelnicki | 2020-04-02 | 1 | -1/+9 |
| |/ |
|
| * | techmap: Fix cell names with _TECHMAP_REPLACE_.* | Marcin Kościelnicki | 2020-03-23 | 1 | -0/+18 |
| * | iopadmap: Look harder for already-present buffers. (#1731) | Marcelina Kościelnicka | 2020-03-02 | 1 | -2/+21 |
| * | Fine tune #1699 tests | Eddie Hung | 2020-02-13 | 1 | -14/+14 |
| * | iopadmap: move \init attributes from outpad output to its input | Eddie Hung | 2020-02-13 | 1 | -0/+37 |
| * | shiftx2mux: fix select out of bounds | Eddie Hung | 2020-02-05 | 2 | -1/+12 |
| * | Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux | Eddie Hung | 2020-02-05 | 1 | -0/+29 |
| |\ |
|
| | * | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor | Eddie Hung | 2020-01-15 | 1 | -0/+13 |
| | |\ |
|
| | * | | abc9: respect (* keep *) on cells | Eddie Hung | 2020-01-13 | 1 | -0/+15 |
| | * | | write_xaiger: add support and test for (* keep *) on wires | Eddie Hung | 2020-01-13 | 1 | -0/+13 |
| * | | | Move from +/shiftx2mux.v into +/techmap.v; cleanup | Eddie Hung | 2020-01-21 | 1 | -4/+4 |
| * | | | New techmap +/shiftx2mux.v which decomposes LSB first; better for ABC | Eddie Hung | 2020-01-21 | 1 | -0/+110 |
| | |/
|/| |
|
| * | | abc9: aAdd test to check $_NOT_s are absorbed | Eddie Hung | 2020-01-15 | 1 | -0/+12 |
| |/ |
|
| * | Add abc9 sanity test | Eddie Hung | 2020-01-09 | 1 | -0/+40 |
| * | iopadmap: Emit tristate buffers with const OE for some edge cases. | Marcin Kościelnicki | 2019-12-25 | 1 | -0/+23 |
| * | iopadmap: Refactor and fix tristate buffer mapping. (#1527) | Marcin Kościelnicki | 2019-12-04 | 1 | -0/+99 |
| * | clkbufmap: Add support for inverters in clock path. | Marcin Kościelnicki | 2019-11-25 | 1 | -5/+16 |
| * | Merge pull request #1422 from YosysHQ/eddie/aigmap_select | Clifford Wolf | 2019-10-03 | 1 | -0/+10 |
| |\ |
|
| | * | Add quick test | Eddie Hung | 2019-09-30 | 1 | -0/+10 |
| * | | Extend test with renaming cells with prefix too | Eddie Hung | 2019-10-02 | 1 | -0/+2 |
| * | | Add test | Eddie Hung | 2019-09-30 | 1 | -0/+16 |
| |/ |
|
| * | Fix _TECHMAP_REMOVEINIT_ handling. | Marcin Kościelnicki | 2019-09-27 | 1 | -2/+12 |
| * | Hell let's add the original #1381 testcase too | Eddie Hung | 2019-09-20 | 1 | -3/+22 |
| * | Add testcase | Eddie Hung | 2019-09-20 | 1 | -0/+43 |
| * | Added extractinv pass | Marcin Kościelnicki | 2019-09-19 | 1 | -0/+41 |
| * | Add -match-init option to dff2dffs. | Marcin Kościelnicki | 2019-09-11 | 1 | -0/+50 |
| * | techmap: Add support for extracting init values of ports | Marcin Kościelnicki | 2019-09-07 | 1 | -0/+98 |
| * | improve clkbuf_inhibit propagation upwards through hierarchy | Marcin Kościelnicki | 2019-08-27 | 1 | -5/+33 |
| * | Improve tests to check that clkbuf is connected to expected | Eddie Hung | 2019-08-26 | 1 | -6/+21 |
| * | Check clkbuf_inhibit=1 is ignored for custom selection | Eddie Hung | 2019-08-23 | 1 | -0/+1 |
| * | Add simple clkbufmap tests | Eddie Hung | 2019-08-23 | 1 | -0/+52 |
| * | tests/techmap/run-test.sh to cope with *.ys | Eddie Hung | 2019-08-23 | 2 | -7/+18 |
| * | Add test | Eddie Hung | 2019-08-20 | 3 | -0/+15 |
| * | Added read-enable to memory model | Clifford Wolf | 2015-09-25 | 1 | -1/+8 |
| * | Added $meminit support to "memory" command | Clifford Wolf | 2015-02-14 | 1 | -0/+5 |
| * | Changed tests/techmap/mem_simple_4x1_map for new $mem/$memwr WR_EN interface | Clifford Wolf | 2014-07-16 | 1 | -2/+13 |
| * | Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh | Clifford Wolf | 2014-03-11 | 1 | -1/+1 |
| * | Use "verilog -noattr" in tests/techmap/mem_simple_4x1 test (for old iverilog) | Clifford Wolf | 2014-03-11 | 1 | -1/+1 |
| * | Use private namespace in mem_simple_4x1_map | Clifford Wolf | 2014-02-21 | 1 | -4/+4 |
| * | Added tests/techmap/mem_simple_4x1 | Clifford Wolf | 2014-02-21 | 7 | -0/+214 |
