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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-13 15:25:37 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-13 15:25:37 -0700 |
| commit | b75c5bf74374156c802461acf0a868f7e5fad3fd (patch) | |
| tree | f5487b2572da55374d6937012de68148cfae2866 /tests/techmap | |
| parent | c6afce763807862305c4ade28ef5bb72a4b078f6 (diff) | |
| download | yosys-b75c5bf74374156c802461acf0a868f7e5fad3fd.tar.gz yosys-b75c5bf74374156c802461acf0a868f7e5fad3fd.tar.bz2 yosys-b75c5bf74374156c802461acf0a868f7e5fad3fd.zip | |
zinit: resolve one more comment by @mwkmwkmwk
Diffstat (limited to 'tests/techmap')
| -rw-r--r-- | tests/techmap/zinit.ys | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/tests/techmap/zinit.ys b/tests/techmap/zinit.ys index c74218f7c..18b17621f 100644 --- a/tests/techmap/zinit.ys +++ b/tests/techmap/zinit.ys @@ -23,6 +23,8 @@ design -load postopt select -assert-count 20 t:$_NOT_ select -assert-count 1 w:unused a:init %i select -assert-count 1 w:Q a:init=13'bxxxx1xxxxxxxx %i +select -assert-count 4 c:dff0 c:dff2 c:dff4 c:dff6 %% t:$_DFF_??1_ %i +select -assert-count 4 c:dff1 c:dff3 c:dff5 c:dff7 %% t:$_DFF_??0_ %i design -reset @@ -45,6 +47,11 @@ $adff #(.WIDTH(2), .CLK_POLARITY(1), .ARST_POLARITY(1'b0), .ARST_VALUE(2'b10)) d $adff #(.WIDTH(2), .CLK_POLARITY(0), .ARST_POLARITY(1'b1), .ARST_VALUE(2'b01)) dff9 (.CLK(C), .ARST(R), .D(D), .Q(Q[12:11])); endmodule EOT +equiv_opt -assert -map +/simcells.v -multiclock zinit +design -load postopt + select -assert-count 0 t:$_NOT_ select -assert-count 1 w:unused a:init %i -select -assert-count 1 w:Q a:init=13'bx00x100000000 %i +select -assert-count 1 w:Q a:init=13'bxxxx1xxxxxxxx %i +select -assert-count 4 c:dff0 c:dff2 c:dff4 c:dff6 %% t:$_DFF_??0_ %i +select -assert-count 4 c:dff1 c:dff3 c:dff5 c:dff7 %% t:$_DFF_??1_ %i |