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* Revert "synth_* with -retime option now calls abc with -D 1 as well"Eddie Hung2019-04-1811-15/+15
* Merge branch 'master' into eddie/fix_retimeEddie Hung2019-04-184-44/+69
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| * Merge pull request #928 from litghost/add_xc7_sim_modelsEddie Hung2019-04-123-41/+60
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| | * Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.Keith Rothman2019-04-123-52/+14
| | * Fix LUT6_2 definition.Keith Rothman2019-04-091-3/+3
| | * Add additional cells sim models for core 7-series primatives.Keith Rothman2019-04-091-0/+57
| * | Fixing issues in CycloneV cell simDiego2019-04-111-3/+9
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* | synth_* with -retime option now calls abc with -D 1 as wellEddie Hung2019-04-1011-15/+15
* | Move techamp t:$_DFF_?N? to before abc callEddie Hung2019-04-051-2/+2
* | RetryEddie Hung2019-04-051-1/+1
* | Resolve @daveshah1 comment, update synth_xilinx helpEddie Hung2019-04-052-7/+9
* | synth_xilinx to techmap FFs after abc call, otherwise -retime failsEddie Hung2019-04-051-3/+3
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* xilinx: Add keep attribute where appropriateDavid Shah2019-03-222-25/+31
* Add Xilinx negedge FFs to synth_xilinx dffinit call, fixes #873Clifford Wolf2019-03-191-2/+4
* Remove ice40/cells_sim.v hack to avoid warning for blocking memory writesClifford Wolf2019-03-121-19/+0
* Fix typo in ice40_braminit help msgClifford Wolf2019-03-091-1/+1
* Merge pull request #859 from smunaut/ice40_braminitClifford Wolf2019-03-094-37/+212
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| * ice40: Run ice40_braminit pass by defaultSylvain Munaut2019-03-081-0/+1
| * ice40: Add ice40_braminit pass to allow initialization of BRAM from fileSylvain Munaut2019-03-083-37/+211
* | Add link to SF2 / igloo2 macro library guideClifford Wolf2019-03-071-21/+24
* | Improvements in sf2 cells_sim.vClifford Wolf2019-03-062-30/+251
* | Add sf2 techmap rules for more FF typesClifford Wolf2019-03-061-25/+39
* | Refactor SF2 iobuf insertion, Add clkint insertionClifford Wolf2019-03-063-83/+152
* | Improvements in SF2 flow and demoClifford Wolf2019-03-052-8/+23
* | Merge pull request #842 from litghost/merge_upstreamClifford Wolf2019-03-0510-176/+570
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| * | Revert BRAM WRITE_MODE changes.Keith Rothman2019-03-041-12/+12
| * | Revert FF models to include IS_x_INVERTED parameters.Keith Rothman2019-03-011-6/+34
| * | Use singular for disabling of DRAM or BRAM inference.Keith Rothman2019-03-011-13/+13
| * | Modify arguments to match existing style.Keith Rothman2019-03-011-6/+6
| * | Changes required for VPR place and route synth_xilinx.Keith Rothman2019-03-0111-221/+587
* | | Merge pull request #850 from daveshah1/ecp5_warn_conflictClifford Wolf2019-03-051-2/+7
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| * | | ecp5: Demote conflicting FF init values to a warningDavid Shah2019-03-041-2/+7
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* / / Use "write_edif -pvector bra" for Xilinx EDIF filesClifford Wolf2019-03-051-1/+1
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* | Fix ECP5 cells_sim for iverilogMiodrag Milanovic2019-03-011-2/+3
* | Merge pull request #836 from elmsfu/ice40_2bit_ram_rw_modeClifford Wolf2019-02-281-2/+2
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| * | ice40: use 2 bits for READ/WRITE MODE for SB_RAM mapElms2019-02-281-2/+2
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* | Reduce amount of trailing whitespace in code baseLarry Doolittle2019-02-286-19/+19
* | Merge pull request #794 from daveshah1/ecp5improveClifford Wolf2019-02-287-12/+388
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| * ecp5: Compatibility with Migen AsyncResetSynchronizerDavid Shah2019-02-252-0/+20
| * ecp5: Add DDRDLLADavid Shah2019-02-191-0/+9
| * ecp5: Add DELAYF/DELAYG blackboxesDavid Shah2019-02-191-0/+18
| * ecp5: Add ECLKSYNCB blackboxDavid Shah2019-02-131-1/+7
| * ecp5: Full set of IO-related blackboxesDavid Shah2019-02-121-0/+102
| * ecp5: Support for flipflop initialisationDavid Shah2019-01-223-4/+199
| * ecp5: Add LSRMODE to flipflops for PRLD supportDavid Shah2019-01-211-7/+16
| * ecp5: More blackboxesDavid Shah2019-01-211-0/+17
| * ecp5: Increase threshold for ALU mappingDavid Shah2019-01-211-1/+1
* | techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut moduleLarry Doolittle2019-02-261-22/+22
* | Clean up some whitepsace outliersLarry Doolittle2019-02-261-2/+2
* | Merge pull request #740 from daveshah1/improve_dressClifford Wolf2019-02-222-3/+3
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