diff options
| author | David Shah <dave@ds0.me> | 2019-01-21 12:33:47 +0000 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-01-21 12:33:47 +0000 |
| commit | 01ea72f53a9707d741a1178d0ac4c4f69d6b65db (patch) | |
| tree | eb7b1af24fb25a73306799b7d28fb139be34424a /techlibs | |
| parent | c4b61f2d69e88ddefd8ceec02ccf074c1b713004 (diff) | |
| download | yosys-01ea72f53a9707d741a1178d0ac4c4f69d6b65db.tar.gz yosys-01ea72f53a9707d741a1178d0ac4c4f69d6b65db.tar.bz2 yosys-01ea72f53a9707d741a1178d0ac4c4f69d6b65db.zip | |
ecp5: Increase threshold for ALU mapping
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/ecp5/arith_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ecp5/arith_map.v b/techlibs/ecp5/arith_map.v index 1094c5f8a..eb7947601 100644 --- a/techlibs/ecp5/arith_map.v +++ b/techlibs/ecp5/arith_map.v @@ -33,7 +33,7 @@ module _80_ecp5_alu (A, B, CI, BI, X, Y, CO); input CI, BI; output [Y_WIDTH-1:0] CO; - wire _TECHMAP_FAIL_ = Y_WIDTH <= 2; + wire _TECHMAP_FAIL_ = Y_WIDTH <= 4; wire [Y_WIDTH-1:0] A_buf, B_buf; \$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(Y_WIDTH)) A_conv (.A(A), .Y(A_buf)); |