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* Fix minor typo in "prep" help messageClifford Wolf2017-12-191-1/+1
* Fix port names in SB_IO_ODGraham Edgecombe2017-12-101-18/+18
* Remove trailing comma from SB_IO_OD port listGraham Edgecombe2017-12-101-1/+1
* Fix spelling in -vpr help for synth_ice40Tim Ansell2017-12-081-1/+1
* Merge pull request #462 from daveshah1/up5kClifford Wolf2017-11-281-0/+263
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| * Add remaining UltraPlus cells to ice40 techlibDavid Shah2017-11-281-0/+263
* | Merge pull request #455 from daveshah1/up5kClifford Wolf2017-11-181-0/+103
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| * Remove unnecessary keep attributesDavid Shah2017-11-181-5/+5
| * Merge branch 'master' into up5kDavid Shah2017-11-172-5/+29
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| * | Add some UltraPlus cells to ice40 techlibDavid Shah2017-11-161-0/+103
* | | Merge pull request #453 from dh73/masterClifford Wolf2017-11-1810-5/+312
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| * | Initial Cyclone 10 supportdh732017-11-085-1/+308
| * | Organizing Speedster file namesdh732017-11-085-4/+4
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* / Add "synth_ice40 -vpr"Clifford Wolf2017-11-162-5/+29
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* Clean whitespace and permissions in techlibs/intelLarry Doolittle2017-10-0521-190/+190
* Rename "write_verilog -nobasenradix" to "write_verilog -decimal"Clifford Wolf2017-10-031-4/+1
* Tested and working altsyncarm without init filesdh732017-10-012-57/+59
* Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ...dh732017-10-0130-727/+2954
* Add first draft of eASIC back-endClifford Wolf2017-09-292-0/+191
* Fix synth_ice40 doc regarding -top defaultClifford Wolf2017-09-291-1/+1
* Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted.Andrew Zonenberg2017-09-142-2/+4
* Initial support for extraction of counters with clock enableAndrew Zonenberg2017-09-141-21/+65
* Merge pull request #406 from azonenberg/coolrunner-techmapClifford Wolf2017-09-022-18/+125
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| * coolrunner2: Finish fixing special-use p-termsRobert Ou2017-09-011-8/+20
| * coolrunner2: Generate a feed-through AND term when necessaryRobert Ou2017-09-011-13/+31
| * coolrunner2: Initial fixes for special p-termsRobert Ou2017-09-012-1/+81
| * coolrunner2: Fix mapping of flip-flopsRobert Ou2017-09-011-1/+0
| * coolrunner2: Combine some for loops togetherRobert Ou2017-09-011-16/+14
* | Fixed typo in error messageAndrew Zonenberg2017-09-011-1/+1
* | Added blackbox $__COUNT_ cell modelAndrew Zonenberg2017-09-012-0/+18
* | Refactoring: moved modules still in cells_sim to cells_sim_wipAndrew Zonenberg2017-09-013-136/+138
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* Merge branch 'master' of https://github.com/cliffordwolf/yosys into counter-e...Andrew Zonenberg2017-08-301-34/+34
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| * Reformatted GP_COUNTx_ADV resets to avoid Yosys thinking that they're multi-e...Andrew Zonenberg2017-08-281-34/+34
* | extract_counter: Minor changes requested to comply with upstream policy, fixe...Andrew Zonenberg2017-08-302-4/+4
* | Finished refactoring counter extraction to be nice and generic. Implemented t...Andrew Zonenberg2017-08-282-1/+69
* | Refactoring: Renamed greenpak4_counters pass to extract_counter, moved it to ...Andrew Zonenberg2017-08-283-515/+1
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* Fixed bug causing GP_SPI model to not synthesizeAndrew Zonenberg2017-08-271-2/+2
* Fixed more issues with GreenPAK counter sim modelsAndrew Zonenberg2017-08-151-19/+23
* Updated PGEN model to have level triggered reset (matches actual hardware beh...Andrew Zonenberg2017-08-151-4/+4
* Fixed bug in GP_COUNTx modelAndrew Zonenberg2017-08-151-7/+12
* Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was highAndrew Zonenberg2017-08-151-47/+47
* Merge pull request #381 from azonenberg/countfixClifford Wolf2017-08-144-504/+900
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| * Fixed typo in GP_COUNT8 sim modelAndrew Zonenberg2017-08-141-1/+1
| * Fixed typo in error messageAndrew Zonenberg2017-08-141-1/+1
| * Changed LEVEL resets for GP_COUNTx to be properly synthesizeableAndrew Zonenberg2017-08-141-48/+60
| * Changed LEVEL resets to be edge triggered anywayAndrew Zonenberg2017-08-141-4/+4
| * Added level-triggered reset support to GP_COUNTx simulation modelsAndrew Zonenberg2017-08-141-2/+68
| * Fixed undeclared "count" in GP_COUNT8_ADVAndrew Zonenberg2017-08-141-0/+2
| * Fixed undeclared "count" in GP_COUNT14_ADVAndrew Zonenberg2017-08-141-0/+2
| * Fixed typo in last commitAndrew Zonenberg2017-08-141-3/+3
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