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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-07 20:21:55 -0700 |
|---|---|---|
| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-14 10:45:39 -0700 |
| commit | ac75524f69f193f8d1b49f8a891a29f90ca96799 (patch) | |
| tree | cef0997f053ba45f33b449c0b8057e67367af7d9 /techlibs | |
| parent | db20e3f1c2926d18df5db759341b46a76299607b (diff) | |
| download | yosys-ac75524f69f193f8d1b49f8a891a29f90ca96799.tar.gz yosys-ac75524f69f193f8d1b49f8a891a29f90ca96799.tar.bz2 yosys-ac75524f69f193f8d1b49f8a891a29f90ca96799.zip | |
Fixed undeclared "count" in GP_COUNT8_ADV
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/greenpak4/cells_sim_digital.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/greenpak4/cells_sim_digital.v b/techlibs/greenpak4/cells_sim_digital.v index 0ed40f79c..91d744039 100644 --- a/techlibs/greenpak4/cells_sim_digital.v +++ b/techlibs/greenpak4/cells_sim_digital.v @@ -219,6 +219,8 @@ module GP_COUNT8_ADV(input CLK, input RST, output reg OUT, parameter COUNT_TO = 8'h1; parameter CLKIN_DIVIDE = 1; + reg[7:0] count = COUNT_TO; + initial begin if(CLKIN_DIVIDE != 1) begin $display("ERROR: CLKIN_DIVIDE values other than 1 not implemented"); |