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* Fix box nameEddie Hung2019-09-271-1/+1
* Missing an '&'Eddie Hung2019-09-261-1/+1
* Use extractinv for synth_xilinx -iseMarcin Kościelnicki2019-09-198-90/+502
* Merge pull request #1379 from mmicko/sim_modelsEddie Hung2019-09-182-7/+162
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| * make note that it is for latch modeMiodrag Milanovic2019-09-181-0/+1
| * better lut handlingMiodrag Milanovic2019-09-181-4/+14
| * better handling of lut and begin/end addMiodrag Milanovic2019-09-181-4/+10
| * Added simulation models for Efinix and AnlogicMiodrag Milanovic2019-09-152-3/+141
* | xilinx: Make blackbox library family-dependent.Marcin Kościelnicki2019-09-157-1024/+19252
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* synth_xilinx: Support init values on Spartan 6 flip-flops properly.Marcin Kościelnicki2019-09-075-53/+219
* Resolve TODO with pin assignments for SRL*Eddie Hung2019-09-041-4/+2
* Add commentsEddie Hung2019-09-021-1/+9
* Rename boxEddie Hung2019-09-021-1/+1
* Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-09-022-7/+8
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| * Fix TRELLIS_FF simulation modelMiodrag Milanovic2019-08-311-6/+7
| * ecp5_gsr: Fix typoDavid Shah2019-08-311-1/+1
| * Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-3013-136/+180
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* | | Remove trailing spaceEddie Hung2019-08-301-2/+2
* | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-3010-109/+150
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| * | ecp5: Add simulation equivalence check for Diamond FF implementationsDavid Shah2019-08-303-0/+87
| * | ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.whitequark2019-08-305-95/+60
| * | ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives.whitequark2019-08-301-35/+20
| * | ecp5: add missing FD primitives.whitequark2019-08-302-72/+76
| * | ecp5: fix CEMUX on IFS/OFS primitives.whitequark2019-08-302-18/+18
| * | Rename boxes tooEddie Hung2019-08-293-3/+3
| * | Do not overwrite LUT paramEddie Hung2019-08-281-1/+0
* | | Use a dummy box file if none specifiedEddie Hung2019-08-282-0/+2
* | | Comment out SB_MAC16 arrival time for now, need to handle all its modesEddie Hung2019-08-281-1/+1
* | | Add arrival for SB_MAC16.OEddie Hung2019-08-281-0/+1
* | | Add arrival times for UEddie Hung2019-08-281-0/+26
* | | LX -> LPEddie Hung2019-08-281-1/+1
* | | Round not floorEddie Hung2019-08-281-21/+21
* | | Add LP timingsEddie Hung2019-08-281-0/+26
* | | LX -> LPEddie Hung2019-08-281-1/+1
* | | Do not overwrite LUT paramEddie Hung2019-08-281-1/+0
* | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrivalEddie Hung2019-08-282-1/+48
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| * | Trailing commaEddie Hung2019-08-281-1/+1
| * | Adapt to $__ICE40_CARRY_WRAPPEREddie Hung2019-08-281-3/+5
| * | Revert "Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason with"Eddie Hung2019-08-281-0/+45
* | | Add arrival times for HX devicesEddie Hung2019-08-281-21/+114
* | | Specify ice40 family to cells_sim.v using defineEddie Hung2019-08-281-1/+8
* | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrivalEddie Hung2019-08-285-68/+20
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| * | Remove $__ICE40_FULL_ADDER handling from ice40_opt; cannot reason withEddie Hung2019-08-281-45/+0
| * | Update box size and timingsEddie Hung2019-08-283-12/+12
| * | Update to new $__ICE40_CARRY_WRAPPEREddie Hung2019-08-281-11/+8
* | | Merge branch 'eddie/xilinx_srl' into xaig_arrivalEddie Hung2019-08-281-15/+22
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| * | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-2813-248/+835
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| * \ \ Merge branch 'master' into eddie/xilinx_srlEddie Hung2019-08-261-0/+8
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| * | | | xilinx_srl now copes with word-level flops $dff{,e}Eddie Hung2019-08-231-8/+3
| * | | | Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-233-15/+30
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