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author | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 18:45:09 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-28 18:45:09 -0700 |
commit | c0b99ed0e8c8c6adf76d70fa71c9753957162e04 (patch) | |
tree | 130d13e8d091fe8c7be87027caa370d2c1468d7d /techlibs | |
parent | cd5d6940e1c108b26ef4990accfb49fe7d8534c4 (diff) | |
download | yosys-c0b99ed0e8c8c6adf76d70fa71c9753957162e04.tar.gz yosys-c0b99ed0e8c8c6adf76d70fa71c9753957162e04.tar.bz2 yosys-c0b99ed0e8c8c6adf76d70fa71c9753957162e04.zip |
Do not overwrite LUT param
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/ice40/ice40_opt.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/techlibs/ice40/ice40_opt.cc b/techlibs/ice40/ice40_opt.cc index 58f106f7c..ea56d3f4d 100644 --- a/techlibs/ice40/ice40_opt.cc +++ b/techlibs/ice40/ice40_opt.cc @@ -125,7 +125,6 @@ static void run_ice40_opts(Module *module) cell->unsetPort("\\I3"); cell->unsetPort("\\CO"); cell->unsetPort("\\O"); - cell->setParam("\\LUT", RTLIL::Const::from_string("0110100110010110")); cell->setParam("\\WIDTH", 4); } continue; |