| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-09-05 | 20 | -91/+531 |
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| | * | Resolve TODO with pin assignments for SRL* | Eddie Hung | 2019-09-04 | 1 | -4/+2 |
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| | * | Add comments | Eddie Hung | 2019-09-02 | 1 | -1/+9 |
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| | * | Rename box | Eddie Hung | 2019-09-02 | 1 | -1/+1 |
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| | * | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-09-02 | 2 | -7/+8 |
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| | * | | Remove trailing space | Eddie Hung | 2019-08-30 | 1 | -2/+2 |
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| | * | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-30 | 10 | -109/+150 |
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| | * | | | Use a dummy box file if none specified | Eddie Hung | 2019-08-28 | 2 | -0/+2 |
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| | * | | | Comment out SB_MAC16 arrival time for now, need to handle all its modes | Eddie Hung | 2019-08-28 | 1 | -1/+1 |
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| | * | | | Add arrival for SB_MAC16.O | Eddie Hung | 2019-08-28 | 1 | -0/+1 |
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| | * | | | Add arrival times for U | Eddie Hung | 2019-08-28 | 1 | -0/+26 |
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| | * | | | LX -> LP | Eddie Hung | 2019-08-28 | 1 | -1/+1 |
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| | * | | | Round not floor | Eddie Hung | 2019-08-28 | 1 | -21/+21 |
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| | * | | | Add LP timings | Eddie Hung | 2019-08-28 | 1 | -0/+26 |
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| | * | | | LX -> LP | Eddie Hung | 2019-08-28 | 1 | -1/+1 |
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| | * | | | Do not overwrite LUT param | Eddie Hung | 2019-08-28 | 1 | -1/+0 |
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| | * | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival | Eddie Hung | 2019-08-28 | 2 | -1/+48 |
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| | * | | | | Add arrival times for HX devices | Eddie Hung | 2019-08-28 | 1 | -21/+114 |
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| | * | | | | Specify ice40 family to cells_sim.v using define | Eddie Hung | 2019-08-28 | 1 | -1/+8 |
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| | * | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival | Eddie Hung | 2019-08-28 | 5 | -68/+20 |
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| | * \ \ \ \ | Merge branch 'eddie/xilinx_srl' into xaig_arrival | Eddie Hung | 2019-08-28 | 1 | -15/+22 |
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| | * \ \ \ \ \ | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-28 | 13 | -249/+865 |
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| | * | | | | | | | Fix spacing | Eddie Hung | 2019-08-23 | 1 | -1/+1 |
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| | * | | | | | | | Remove unused model | Eddie Hung | 2019-08-23 | 1 | -13/+0 |
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| | * | | | | | | | Put attributes above port | Eddie Hung | 2019-08-23 | 2 | -27/+62 |
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| | * | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-23 | 17 | -102/+981 |
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| | * | | | | | | | | Use semicolon | Eddie Hung | 2019-08-21 | 1 | -1/+1 |
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| | * | | | | | | | | techmap before read | Eddie Hung | 2019-08-21 | 1 | -1/+1 |
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| | * | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrival | Eddie Hung | 2019-08-21 | 1 | -1/+1 |
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| | * | | | | | | | | | Add abc_arrival to SRL* | Eddie Hung | 2019-08-21 | 1 | -3/+5 |
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| | * | | | | | | | | | Oops | Eddie Hung | 2019-08-20 | 1 | -1/+1 |
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| | * | | | | | | | | | xilinx to use abc_map.v with -max_iter 1 | Eddie Hung | 2019-08-20 | 6 | -171/+26 |
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| | * | | | | | | | | | ecp5: remove DPR16X4 from abc_unmap.v | Eddie Hung | 2019-08-20 | 1 | -20/+0 |
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| | * | | | | | | | | | ecp5 to use -max_iter 1 | Eddie Hung | 2019-08-20 | 3 | -4/+3 |
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| | * | | | | | | | | | ecp5 to use abc_map.v and _unmap.v | Eddie Hung | 2019-08-20 | 7 | -14/+89 |
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| | * | | | | | | | | | Add reference to FD* timing | Eddie Hung | 2019-08-20 | 1 | -0/+2 |
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| | * | | | | | | | | | Remove sequential extension | Eddie Hung | 2019-08-20 | 6 | -359/+17 |
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| | * | | | | | | | | | Remove SRL* delays from cells_sim.v | Eddie Hung | 2019-08-20 | 1 | -5/+3 |
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| | * | | | | | | | | | LUTMUX -> LUTMUX6 | Eddie Hung | 2019-08-20 | 1 | -2/+2 |
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| | * | | | | | | | | | Cleanup techmap in map_luts | Eddie Hung | 2019-08-20 | 1 | -3/+5 |
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| | * | | | | | | | | | Move `techmap abc_map.v` into map_luts | Eddie Hung | 2019-08-20 | 1 | -1/+2 |
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| | * | | | | | | | | | Remove delays from abc_map.v | Eddie Hung | 2019-08-20 | 1 | -5/+2 |
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| | * | | | | | | | | | Typo | Eddie Hung | 2019-08-20 | 1 | -1/+1 |
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| | * | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_dff | Eddie Hung | 2019-08-20 | 4 | -16/+19 |
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| | * | | | | | | | | | | Wrap SRL{16,32} too | Eddie Hung | 2019-08-20 | 3 | -7/+98 |
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| | * | | | | | | | | | | Wrap LUTRAMs in order to capture comb/seq behaviour | Eddie Hung | 2019-08-20 | 5 | -36/+200 |
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| | * | | | | | | | | | | Add LUTRAM delays | Eddie Hung | 2019-08-20 | 1 | -3/+6 |
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| | * | | | | | | | | | | Remove mapping rules | Eddie Hung | 2019-08-20 | 1 | -33/+0 |
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| | * | | | | | | | | | | Remove -icells | Eddie Hung | 2019-08-20 | 1 | -2/+2 |
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| | * | | | | | | | | | | Use abc_{map,unmap,model}.v | Eddie Hung | 2019-08-20 | 7 | -110/+324 |
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index : iCE40/yosys | |
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