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* Merge remote-tracking branch 'origin/master' into eddie/xilinx_srlEddie Hung2019-08-301-1/+1
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| * Fix typo that's gone unnoticed for 5 months!?!Eddie Hung2019-08-291-1/+1
* | Actually, there might not be any harm in updating sigmap...Eddie Hung2019-08-221-3/+1
* | Add comment as per @cliffordwolfEddie Hung2019-08-221-0/+11
* | Revert "Try way that doesn't involve creating a new wire"Eddie Hung2019-08-221-15/+10
* | Try way that doesn't involve creating a new wireEddie Hung2019-08-221-10/+15
* | If d_bit already in sigbit_chain_next, create extra wireEddie Hung2019-08-221-3/+6
* | Remove `shregmap -tech xilinx` additionsEddie Hung2019-08-221-189/+8
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* Use ID::keep more liberally tooEddie Hung2019-08-151-2/+2
* Use more ID::{A,B,Y,blackbox,whitebox}Eddie Hung2019-08-151-11/+11
* ID(\\.*) -> ID(.*)Eddie Hung2019-08-151-54/+54
* Transform all "\\*" identifiers into ID()Eddie Hung2019-08-151-54/+54
* Transform "$.*" to ID("$.*") in passes/techmapEddie Hung2019-08-151-21/+21
* More use of IdString::in()Eddie Hung2019-08-151-1/+1
* Merge pull request #1085 from YosysHQ/eddie/shregmap_improveEddie Hung2019-06-211-3/+15
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| * Actually, there might not be any harm in updating sigmap...Eddie Hung2019-06-201-3/+1
| * Add comment as per @cliffordwolfEddie Hung2019-06-201-0/+11
| * Revert "Try way that doesn't involve creating a new wire"Eddie Hung2019-06-111-15/+10
| * Try way that doesn't involve creating a new wireEddie Hung2019-06-111-10/+15
| * If d_bit already in sigbit_chain_next, create extra wireEddie Hung2019-06-101-3/+6
* | Improve shregmap help message, fixes #1113Clifford Wolf2019-06-201-0/+2
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* Missing doc for -tech xilinx in shregmapEddie Hung2019-06-051-0/+3
* Copy with 1'bx padding in $shiftxEddie Hung2019-04-281-1/+11
* Use new pmux2shiftx from #944, remove my old attemptEddie Hung2019-04-211-52/+0
* $_XILINX_SHREG_ to preserve src attributeEddie Hung2019-04-081-0/+1
* Cope with undoing #895Eddie Hung2019-04-081-14/+26
* Revert "Remove handling for $pmux, since #895"Eddie Hung2019-04-081-0/+40
* Call shregmap twice -- once for variable, another for fixedEddie Hung2019-04-051-29/+17
* Remove handling for $pmux, since #895Eddie Hung2019-04-031-40/+0
* Cope with SHREG not having E port; Revert $pmux fine tuneEddie Hung2019-03-231-4/+3
* Add support for SHREGMAP+$mux, also fine tune $pmuxEddie Hung2019-03-221-1/+24
* Leftover printfEddie Hung2019-03-221-1/+0
* Fixes for multibitEddie Hung2019-03-221-18/+38
* Working for 1 bitEddie Hung2019-03-221-11/+49
* OptEddie Hung2019-03-211-1/+1
* Fix spacingEddie Hung2019-03-201-239/+239
* Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable lengthEddie Hung2019-03-191-5/+14
* Add support for variable length Xilinx SRL > 128Eddie Hung2019-03-191-6/+0
* shregmap -tech xilinx to delete $shiftx for var length SRLEddie Hung2019-03-191-10/+3
* Make output port a non chain userEddie Hung2019-03-191-2/+4
* Fix shregmap to correctly recognise non chain users; cleanupEddie Hung2019-03-181-17/+15
* shiftx NULL pointer checkEddie Hung2019-03-181-8/+10
* CleanupEddie Hung2019-03-161-35/+25
* Only accept <128 for variable length, only if $shiftx exclusiveEddie Hung2019-03-161-8/+17
* WorkingEddie Hung2019-03-151-227/+356
* Revert "Add shregmap -init_msb_first and use in synth_xilinx"Eddie Hung2019-03-141-14/+2
* Add shregmap -init_msb_first and use in synth_xilinxEddie Hung2019-03-141-2/+14
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-201-2/+2
* Added support for "keep" attribute to shregmapClifford Wolf2016-05-071-2/+2
* Changed port names in greenpak shregmapAndrew Zonenberg2016-05-041-1/+1