| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Reject if (* init *) present | Eddie Hung | 2019-09-25 | 1 | -0/+3 |
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| * | unextend only used in init | Eddie Hung | 2019-09-25 | 1 | -2/+1 |
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| * | Use new port/param overload in pmg | Eddie Hung | 2019-09-20 | 1 | -2/+2 |
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| * | Cleanup ice40_dsp.pmg | Eddie Hung | 2019-09-20 | 1 | -12/+6 |
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| * | Small cleanup | Eddie Hung | 2019-09-20 | 1 | -19/+18 |
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| * | Disable support for SB_MAC16 reset since it is async | Eddie Hung | 2019-09-19 | 1 | -0/+4 |
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| * | SB_MAC16 ffCD to not pack same as ffO | Eddie Hung | 2019-09-19 | 1 | -2/+2 |
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| * | Add an index | Eddie Hung | 2019-09-19 | 1 | -0/+1 |
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| * | Revert index to select | Eddie Hung | 2019-09-19 | 1 | -1/+1 |
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| * | Refactor ce{mux,pol} -> hold{mux,pol} | Eddie Hung | 2019-09-19 | 1 | -64/+64 |
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| * | Add HOLD/RST support for SB_MAC16 | Eddie Hung | 2019-09-19 | 1 | -53/+69 |
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| * | Add support for SB_MAC16 CD and H registers | Eddie Hung | 2019-09-19 | 1 | -9/+62 |
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| * | Refactor ice40_dsp.pmg | Eddie Hung | 2019-09-19 | 1 | -168/+401 |
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| * | Tidy up ice40_dsp some more | Eddie Hung | 2019-09-06 | 1 | -11/+10 |
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| * | Cleanup | Eddie Hung | 2019-09-05 | 1 | -17/+17 |
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| * | Refactor ice40_dsp | Eddie Hung | 2019-09-05 | 1 | -27/+27 |
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| * | Fix broken ice40_dsp | Eddie Hung | 2019-09-05 | 1 | -93/+63 |
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| * | Update comment | Eddie Hung | 2019-08-30 | 1 | -1/+1 |
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| * | Fix compile error | Eddie Hung | 2019-08-20 | 1 | -4/+14 |
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| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-08-20 | 1 | -0/+1 |
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| | * | Change pmgen default rule to reject, switch peepopt behavior to accept | Clifford Wolf | 2019-08-15 | 1 | -0/+1 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Simplify | Eddie Hung | 2019-08-15 | 1 | -4/+2 |
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| * | | ffH -> ffFJKG | Eddie Hung | 2019-08-15 | 1 | -8/+8 |
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| * | | Fixes for reverting SigSpec helper functions | Eddie Hung | 2019-08-14 | 1 | -8/+12 |
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| * | | Revert changes to RTLIL::SigSpec methods | Eddie Hung | 2019-08-13 | 1 | -6/+28 |
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| * | | Improve ice40_dsp for non-fully-32-bit adders | Eddie Hung | 2019-08-09 | 1 | -3/+8 |
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| * | | Another filter -> if | Eddie Hung | 2019-08-09 | 1 | -2/+2 |
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| * | | Cleanup | Eddie Hung | 2019-08-09 | 1 | -8/+8 |
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| * | | Fix check | Eddie Hung | 2019-08-09 | 1 | -4/+6 |
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| * | | Revert "Fix typo" | Eddie Hung | 2019-08-09 | 1 | -1/+1 |
| | | | | | | | | | This reverts commit e3c39cc450a0317ad7e8234bb866d55465548c9c. | ||||
| * | | Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing | Eddie Hung | 2019-08-08 | 1 | -31/+68 |
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| * | | Do not SigSpec::extract() beyond bounds | Eddie Hung | 2019-08-07 | 1 | -6/+8 |
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| * | | Do not pack registers if (* keep *) | Eddie Hung | 2019-08-07 | 1 | -0/+20 |
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| * | | Add comment about supporting $dffe in ice40_dsp | Eddie Hung | 2019-08-01 | 1 | -0/+1 |
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| * | | Cope with sign extension in mul2dsp | Eddie Hung | 2019-08-01 | 1 | -6/+6 |
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| * | | Fix typo | Eddie Hung | 2019-08-01 | 1 | -1/+1 |
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| * | | Fix muxAB logic | Eddie Hung | 2019-07-23 | 1 | -3/+2 |
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| * | | Simplify and fix for MACs | Eddie Hung | 2019-07-23 | 1 | -15/+18 |
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| * | | Fix typo | Eddie Hung | 2019-07-23 | 1 | -13/+21 |
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| * | | Pack hi and lo registers separately | Eddie Hung | 2019-07-22 | 1 | -19/+43 |
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| * | | Rename according to vendor doc TN1295 | Eddie Hung | 2019-07-22 | 1 | -31/+31 |
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| * | | Pack Y register | Eddie Hung | 2019-07-22 | 1 | -4/+8 |
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| * | | Pack adders not just accumulators | Eddie Hung | 2019-07-22 | 1 | -4/+7 |
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| * | | Restore old ffY behaviour | Eddie Hung | 2019-07-19 | 1 | -16/+5 |
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| * | | Cleanup | Eddie Hung | 2019-07-19 | 1 | -5/+5 |
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| * | | Fine tune ice40_dsp.pmg, add support for packing subsets of registers | Eddie Hung | 2019-07-19 | 1 | -22/+31 |
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| * | | ice40_dsp to accept $__MUL16X16 too | Eddie Hung | 2019-07-18 | 1 | -1/+1 |
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| * | Add pmgen support for multiple patterns in one matcher | Clifford Wolf | 2019-04-29 | 1 | -0/+2 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Detect and reject cases that do not map well to iCE40 DSPs (yet) | Clifford Wolf | 2019-02-20 | 1 | -0/+10 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add actual DSP inference to ice40_dsp pass | Clifford Wolf | 2019-02-17 | 1 | -2/+16 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
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index : iCE40/yosys | |
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