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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 20:04:44 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-19 20:04:44 -0700 |
| commit | 8a94ce7aa524eea0429446e0a5e8c64bee45ac55 (patch) | |
| tree | d9aa74ec43dedeadd79d2cdb7f8786e09e63ba0f /passes/pmgen/ice40_dsp.pmg | |
| parent | 1602516a8b2ebd432528e9ba39a00db4e6edc081 (diff) | |
| download | yosys-8a94ce7aa524eea0429446e0a5e8c64bee45ac55.tar.gz yosys-8a94ce7aa524eea0429446e0a5e8c64bee45ac55.tar.bz2 yosys-8a94ce7aa524eea0429446e0a5e8c64bee45ac55.zip | |
Add an index
Diffstat (limited to 'passes/pmgen/ice40_dsp.pmg')
| -rw-r--r-- | passes/pmgen/ice40_dsp.pmg | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/pmgen/ice40_dsp.pmg b/passes/pmgen/ice40_dsp.pmg index 73e92031e..35db22807 100644 --- a/passes/pmgen/ice40_dsp.pmg +++ b/passes/pmgen/ice40_dsp.pmg @@ -189,6 +189,7 @@ match add index <SigBit> port(add, AB)[0] === sigH[0] filter GetSize(port(add, AB)) <= GetSize(sigH) filter port(add, AB) == sigH.extract(0, GetSize(port(add, AB))) + filter nusers(sigH.extract_end(GetSize(port(add, AB)))) <= 1 set addAB AB optional endmatch |