| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | memory_map: avoid undriven unused FF inputs for -keepdc | Jannis Harder | 2022-06-28 | 1 | -0/+3 |
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| * | memory_map: -keepdc option for formal | Jannis Harder | 2022-06-27 | 1 | -3/+14 |
| | | | | | Use it when invoking memory_map -rom-only from write_{smt2,btor}. | ||||
| * | memory_map: Add -rom-only option. | Marcelina Kościelnicka | 2022-06-17 | 1 | -4/+18 |
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| * | memory_map: Use const drivers instead of FFs for ROMs. | Marcelina Kościelnicka | 2022-06-17 | 1 | -52/+59 |
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| * | memory_libmap: Fix wrprio handling. | Marcelina Kościelnicka | 2022-06-17 | 1 | -1/+1 |
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| * | memory_libmap: Fix params emitted for unused ports for consistency. | Marcelina Kościelnicka | 2022-06-16 | 1 | -2/+3 |
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| * | Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}. | Marcelina Kościelnicka | 2022-06-02 | 2 | -7/+23 |
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| * | memory_dff: Add support for no_rw_check attribute. | Marcelina Kościelnicka | 2022-06-02 | 2 | -0/+13 |
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| * | Add memory_bmux2rom pass. | Marcelina Kościelnicka | 2022-05-18 | 3 | -1/+97 |
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| * | Add memory_libmap pass. | Marcelina Kościelnicka | 2022-05-18 | 5 | -0/+3872 |
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| * | memory_share: fix wrong argidx in extra_args | imhcyx | 2022-05-05 | 1 | -1/+1 |
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| * | memory_share: Fix up mismatched address widths. | Marcelina Kościelnicka | 2022-04-15 | 1 | -0/+14 |
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| * | memory_bram: Make use of new mem emulation functions to map more RAMs. | Marcelina Kościelnicka | 2022-01-27 | 1 | -18/+10 |
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| * | memory_share: Fix SAT-based sharing for wide ports. | Marcelina Kościelnicka | 2021-12-20 | 1 | -1/+3 |
| | | | | | Fixes #3117. | ||||
| * | FfData: some refactoring. | Marcelina Kościelnicka | 2021-10-07 | 1 | -1/+1 |
| | | | | | | | | | | | - FfData now keeps track of the module and underlying cell, if any (so calling emit on FfData created from a cell will replace the existing cell) - FfData implementation is split off to its own .cc file for faster compilation - the "flip FF data sense by inserting inverters in front and after" functionality that zinit uses is moved onto FfData class and beefed up to have dffsr support, to support more use cases | ||||
| * | kernel/ff: Refactor FfData to enable FFs with async load. | Marcelina Kościelnicka | 2021-10-02 | 1 | -7/+15 |
| | | | | | | | | | | | - *_en is split into *_ce (clock enable) and *_aload (async load aka latch gate enable), so both can be present at once - has_d is removed - has_gclk is added (to have a clear marker for $ff) - d_is_const and val_d leftovers are removed - async2sync, clk2fflogic, opt_dff are updated to operate correctly on FFs with async load | ||||
| * | Add opt_mem_widen pass. | Marcelina Kościelnicka | 2021-08-14 | 1 | -0/+2 |
| | | | | | If all of us are wide, then none of us are! | ||||
| * | memory_share: Add -nosat and -nowiden options. | Marcelina Kościelnicka | 2021-08-14 | 2 | -10/+41 |
| | | | | | This unlocks wide port recognition by default. | ||||
| * | memory_dff: Recognize soft transparency logic. | Marcelina Kościelnicka | 2021-08-13 | 1 | -7/+451 |
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| * | Add new opt_mem_priority pass. | Marcelina Kościelnicka | 2021-08-13 | 1 | -2/+4 |
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| * | memory_share: Pass addresses through sigmap_xmux everywhere. | Marcelina Kościelnicka | 2021-08-13 | 1 | -20/+25 |
| | | | | | This fixes wide port recognition in some cases. | ||||
| * | memory_dff: Recognize read ports with reset / initial value. | Marcelina Kościelnicka | 2021-08-11 | 1 | -7/+0 |
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| * | kernel/mem: Introduce transparency masks. | Marcelina Kościelnicka | 2021-08-11 | 3 | -69/+42 |
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| * | Refactor common parts of SAT-using optimizations into a helper. | Marcelina Kościelnicka | 2021-08-09 | 1 | -61/+10 |
| | | | | | | | | | | | | | | This also aligns the functionality: - in all cases, the onehot attribute is used to create appropriate constraints (previously, opt_dff didn't do it at all, and share created one-hot constraints based on $pmux presence alone, which is unsound) - in all cases, shift and mul/div/pow cells are now skipped when importing the SAT problem (previously only memory_share did this) — this avoids creating clauses for hard cells that are unlikely to help with proving the UNSATness needed for optimization | ||||
| * | memory_share: Don't skip ports with EN wired to input for SAT sharing. | Marcelina Kościelnicka | 2021-08-04 | 1 | -3/+1 |
| | | | | | Fixes #2912. | ||||
| * | memory_bram: Move init data swizzling before other swizzling. | Marcelina Kościelnicka | 2021-08-03 | 1 | -18/+18 |
| | | | | | Fixes #2907. | ||||
| * | memory_bram: Some refactoring | Marcelina Kościelnicka | 2021-08-01 | 1 | -196/+174 |
| | | | | | | | This will make more sense when the new transparency masks land. Fixes #2902. | ||||
| * | Fixing old e-mail addresses and deadnames | Claire Xenia Wolf | 2021-06-08 | 9 | -9/+9 |
| | | | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g; | ||||
| * | memory_map: Improve start_offset handling. | Marcelina Kościelnicka | 2021-05-31 | 1 | -35/+31 |
| | | | | | Fixes #2775. | ||||
| * | memory_share: Add read port merging. | Marcelina Kościelnicka | 2021-05-29 | 1 | -0/+140 |
| | | | | | | This is mostly meant for wide port recognition, but may also happen to merge some ports with compatible initial/reset values (eg. 0 vs x). | ||||
| * | memory_share: Improve sat-based port sharing. | Marcelina Kościelnicka | 2021-05-28 | 1 | -117/+151 |
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| * | Make a few passes auto-call Mem::narrow instead of rejecting wide ports. | Marcelina Kościelnicka | 2021-05-28 | 1 | -14/+1 |
| | | | | | | | This essentially adds wide port support for free in passes that don't have a usefully better way of handling wide ports than just breaking them up to narrow ports, avoiding "please run memory_narrow" annoyance. | ||||
| * | memory_share: Improve same-address merging, recognize wide write ports. | Marcelina Kościelnicka | 2021-05-27 | 1 | -204/+77 |
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| * | mem/extract_rdff: Fix "no FF made" edge case. | Marcelina Kościelnicka | 2021-05-25 | 1 | -2/+5 |
| | | | | | | | | When converting a sync transparent read port with const address to async read port, nothing at all needs to be done other than clk_enable change, and thus we have no FF cell to return. Handle this case correctly in the helper and in its users. | ||||
| * | memory_bram: Reuse extract_rdff helper for make_outreg. | Marcelina Kościelnicka | 2021-05-25 | 1 | -23/+38 |
| | | | | | | Also properly skip read ports with init value or reset when not making use of make_outreg. Proper support for matching those will land later. | ||||
| * | memory_bram: Respect write port priority. | Marcelina Kościelnicka | 2021-05-25 | 1 | -0/+14 |
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| * | Add memory_narrow pass. | Marcelina Kościelnicka | 2021-05-25 | 2 | -0/+68 |
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| * | memory_share: Add wide port support. | Marcelina Kościelnicka | 2021-05-25 | 1 | -0/+6 |
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| * | memory_map: Add wide port support. | Marcelina Kościelnicka | 2021-05-25 | 1 | -16/+17 |
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| * | Reject wide ports in some passes that will never support them. | Marcelina Kościelnicka | 2021-05-25 | 1 | -0/+14 |
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| * | memory_share: Use Mem helpers. | Marcelina Kościelnicka | 2021-05-23 | 1 | -89/+71 |
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| * | extract_rdff: Add initvals parameter. | Marcelina Kościelnicka | 2021-05-23 | 2 | -9/+15 |
| | | | | | | This is not used yet, but will be needed when read port reset/initial value support lands. | ||||
| * | memory_share: Split off feedback path finding as a separate pass. | Marcelina Kościelnicka | 2021-05-23 | 2 | -242/+9 |
| | | | | | | memory_share is actually three passes in a trenchcoat. Split off the one that has the least in common with the other two as a separate pass. | ||||
| * | Add new helper class for merging FFs into cells, use for memory_dff. | Marcelina Kościelnicka | 2021-05-23 | 1 | -237/+104 |
| | | | | | Fixes #1854. | ||||
| * | memory_memx: Use Mem helper. | Marcelina Kościelnicka | 2021-05-22 | 1 | -42/+31 |
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| * | memory_dff: Use Mem helper. | Marcelina Kościelnicka | 2021-05-21 | 1 | -19/+26 |
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| * | memory_dff: Remove now-useless write port handling. | Marcelina Kościelnicka | 2021-03-08 | 3 | -74/+11 |
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| * | memory_dff: Remove code looking for $mux cells. | Marcelina Kościelnicka | 2021-03-08 | 1 | -56/+12 |
| | | | | | This job is now performed by `opt_dff`, which runs before this pass. | ||||
| * | memory_dff: Fix needlessly duplicating enable bits. | Marcelina Kościelnicka | 2020-10-22 | 1 | -0/+8 |
| | | | | | | | | | | When the register being merged into the EN signal happens to be a $sdff, the current code creates a new $mux for every bit, even if they happen to be identical (as is usually the case), preventing proper grouping further down the flow. Fix this by adding a simple cache. Fixes #2409. | ||||
| * | memory_bram: Use Mem helpers. | Marcelina Kościelnicka | 2020-10-21 | 1 | -121/+90 |
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