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| author | imhcyx <git@iwannaknow.me> | 2022-05-05 16:58:39 +0800 |
|---|---|---|
| committer | imhcyx <git@iwannaknow.me> | 2022-05-05 16:58:39 +0800 |
| commit | 71166eeecf5d3c9fcdd86e692511e772f3e437a1 (patch) | |
| tree | e7741830b43854d13edc2c30e96377ef1a3b11ec /passes/memory | |
| parent | a8cc0c3930ff6820df7e1a859d7d479f2660c07e (diff) | |
| download | yosys-71166eeecf5d3c9fcdd86e692511e772f3e437a1.tar.gz yosys-71166eeecf5d3c9fcdd86e692511e772f3e437a1.tar.bz2 yosys-71166eeecf5d3c9fcdd86e692511e772f3e437a1.zip | |
memory_share: fix wrong argidx in extra_args
Diffstat (limited to 'passes/memory')
| -rw-r--r-- | passes/memory/memory_share.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc index 1ddc13f90..5cb11d62b 100644 --- a/passes/memory/memory_share.cc +++ b/passes/memory/memory_share.cc @@ -555,7 +555,7 @@ struct MemorySharePass : public Pass { } break; } - extra_args(args, 1, design); + extra_args(args, argidx, design); MemoryShareWorker msw(design, flag_widen, flag_sat); for (auto module : design->selected_modules()) |