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authorMarcelina Koƛcielnicka <mwk@0x04.net>2021-05-23 18:29:44 +0200
committerMarcelina Koƛcielnicka <mwk@0x04.net>2021-05-23 22:05:26 +0200
commitafd5366fc2841ef21acc9f994ca2052b9dfa21e8 (patch)
treef539c0492862f16a8f07d9910a32386d20479e40 /passes/memory
parent33513d923a398a955c1c7e5f534e3099f3940154 (diff)
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extract_rdff: Add initvals parameter.
This is not used yet, but will be needed when read port reset/initial value support lands.
Diffstat (limited to 'passes/memory')
-rw-r--r--passes/memory/memory_map.cc6
-rw-r--r--passes/memory/memory_nordff.cc18
2 files changed, 15 insertions, 9 deletions
diff --git a/passes/memory/memory_map.cc b/passes/memory/memory_map.cc
index 032b8fbbd..57863c0b6 100644
--- a/passes/memory/memory_map.cc
+++ b/passes/memory/memory_map.cc
@@ -34,10 +34,12 @@ struct MemoryMapWorker
RTLIL::Design *design;
RTLIL::Module *module;
+ SigMap sigmap;
+ FfInitVals initvals;
std::map<std::pair<RTLIL::SigSpec, RTLIL::SigSpec>, RTLIL::SigBit> decoder_cache;
- MemoryMapWorker(RTLIL::Design *design, RTLIL::Module *module) : design(design), module(module) {}
+ MemoryMapWorker(RTLIL::Design *design, RTLIL::Module *module) : design(design), module(module), sigmap(module), initvals(&sigmap, module) {}
std::string map_case(std::string value) const
{
@@ -228,7 +230,7 @@ struct MemoryMapWorker
for (int i = 0; i < GetSize(mem.rd_ports); i++)
{
auto &port = mem.rd_ports[i];
- if (mem.extract_rdff(i))
+ if (mem.extract_rdff(i, &initvals))
count_dff++;
RTLIL::SigSpec rd_addr = port.addr;
rd_addr.extend_u0(abits, false);
diff --git a/passes/memory/memory_nordff.cc b/passes/memory/memory_nordff.cc
index bb853c483..665efceb2 100644
--- a/passes/memory/memory_nordff.cc
+++ b/passes/memory/memory_nordff.cc
@@ -51,15 +51,19 @@ struct MemoryNordffPass : public Pass {
extra_args(args, argidx, design);
for (auto module : design->selected_modules())
- for (auto &mem : Mem::get_selected_memories(module))
{
- bool changed = false;
- for (int i = 0; i < GetSize(mem.rd_ports); i++)
- if (mem.extract_rdff(i))
- changed = true;
+ SigMap sigmap(module);
+ FfInitVals initvals(&sigmap, module);
+ for (auto &mem : Mem::get_selected_memories(module))
+ {
+ bool changed = false;
+ for (int i = 0; i < GetSize(mem.rd_ports); i++)
+ if (mem.extract_rdff(i, &initvals))
+ changed = true;
- if (changed)
- mem.emit();
+ if (changed)
+ mem.emit();
+ }
}
}
} MemoryNordffPass;