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| | * | | Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.Keith Rothman2019-04-123-52/+14
| | * | | Fix LUT6_2 definition.Keith Rothman2019-04-091-3/+3
| | * | | Add additional cells sim models for core 7-series primatives.Keith Rothman2019-04-091-0/+57
| * | | | Merge pull request #933 from dh73/masterClifford Wolf2019-04-121-3/+9
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| | * | | | Fixing issues in CycloneV cell simDiego2019-04-111-3/+9
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| * | | | Merge pull request #932 from YosysHQ/eddie/fixdlatchClifford Wolf2019-04-122-3/+4
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| | * | Add default entry to testcaseEddie Hung2019-04-111-2/+3
| | * | Recognise default entry in case even if all cases covered (#931)Eddie Hung2019-04-111-1/+1
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| | * synth_* with -retime option now calls abc with -D 1 as wellEddie Hung2019-04-1011-15/+15
| | * Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen"Eddie Hung2019-04-101-2/+0
| | * Revert ""&nf -D 0" fails => use "-D 1" instead"Eddie Hung2019-04-101-1/+1
| | * Merge remote-tracking branch 'origin/master' into eddie/fix_retimeEddie Hung2019-04-102-4/+5
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| * | Fix a few typosEddie Hung2019-04-081-3/+3
| * | Merge pull request #919 from YosysHQ/multiport_transpClifford Wolf2019-04-081-1/+2
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| | * | memory_bram: Fix multiport make_transpDavid Shah2019-04-071-1/+2
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* | | $_XILINX_SHREG_ to preserve src attributeEddie Hung2019-04-081-0/+1
* | | Update CHANGELOGEddie Hung2019-04-081-1/+1
* | | Merge branch 'undo_pr895' into xc7srlEddie Hung2019-04-081-17/+3
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| * | | Undo #895 by instead setting an attributeEddie Hung2019-04-081-17/+3
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* | | Cope with undoing #895Eddie Hung2019-04-081-14/+26
* | | Revert "Remove handling for $pmux, since #895"Eddie Hung2019-04-081-0/+40
* | | Call shregmap twice -- once for variable, another for fixedEddie Hung2019-04-053-37/+31
* | | Merge branch 'eddie/fix_retime' into xc7srlEddie Hung2019-04-052-1/+7
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| * | Add retime testEddie Hung2019-04-051-0/+6
| * | Fix S0 -> S1Eddie Hung2019-04-051-1/+1
* | | Move dffinit til after abcEddie Hung2019-04-053-2/+2
* | | Merge branch 'eddie/fix_retime' into xc7srlEddie Hung2019-04-0511-14/+85
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| * | Move techamp t:$_DFF_?N? to before abc callEddie Hung2019-04-051-2/+2
| * | RetryEddie Hung2019-04-051-1/+1
| * | "&nf -D 0" fails => use "-D 1" insteadEddie Hung2019-04-051-1/+1
| * | Resolve @daveshah1 comment, update synth_xilinx helpEddie Hung2019-04-052-7/+9
| * | synth_xilinx to techmap FFs after abc call, otherwise -retime failsEddie Hung2019-04-051-3/+3
| * | abc -dff now implies "-D 0" otherwise retiming doesn't happenEddie Hung2019-04-051-0/+2
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| * Add "read_ilang -lib"Clifford Wolf2019-04-055-3/+39
| * Added missing argument checking to "mutate" commandClifford Wolf2019-04-041-0/+32
* | techmap inside map_cells stageEddie Hung2019-04-052-2/+1
* | Merge branch 'map_cells_before_map_luts' into xc7srlEddie Hung2019-04-041-0/+1
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| * | Missing techmap entry in helpEddie Hung2019-04-041-0/+1
* | | Use soft-logic, not LUT3 instantiationEddie Hung2019-04-041-4/+2
* | | Merge branch 'map_cells_before_map_luts' into xc7srlEddie Hung2019-04-042-13/+13
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| * | synth_xilinx to map_cells before map_lutsEddie Hung2019-04-041-12/+12
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| * Merge pull request #913 from smunaut/fix_proc_muxEddie Hung2019-04-031-1/+1
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| | * proc_mux: Fix crash when trying to optimize non-existant mux to shiftxSylvain Munaut2019-04-031-1/+1
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* | Cleanup commentsEddie Hung2019-04-041-5/+4
* | t:$dff* -> t:$dff t:$dffeEddie Hung2019-04-041-2/+2
* | Remove handling for $pmux, since #895Eddie Hung2019-04-031-40/+0
* | -nosrl meant when -nobramEddie Hung2019-04-031-1/+1
* | Remove duplicate STARTUPE2Eddie Hung2019-04-031-1/+0
* | Disable shregmap in synth_xilinx if -retimeEddie Hung2019-04-031-3/+3
* | Add changelog entryEddie Hung2019-04-031-0/+1
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