iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge remote-tracking branch 'origin/clifford/whitebox' into xaig	Eddie Hung	2019-04-18	23	-42/+81
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\| *	Add "whitebox" attribute, add "read_verilog -wb"	Clifford Wolf	2019-04-18	23	-42/+81
* \|	Skip if abc_box_id earlier	Eddie Hung	2019-04-17	1	-3/+3
* \|	Remove use of abc_box_id in stat	Eddie Hung	2019-04-17	1	-3/+0
* \|	Fix $anyseq warning and cleanup	Eddie Hung	2019-04-17	1	-16/+7
* \|	Update Makefile.inc too	Eddie Hung	2019-04-17	1	-4/+6
* \|	Reduce to three devices: hx, lp, u	Eddie Hung	2019-04-17	7	-4/+23
* \|	Do not print slack histogram	Eddie Hung	2019-04-17	1	-1/+1
* \|	Add up5k timings	Eddie Hung	2019-04-17	2	-0/+19
* \|	Fix grammar	Eddie Hung	2019-04-17	1	-2/+2
* \|	Update error message	Eddie Hung	2019-04-17	1	-1/+1
* \|	Add "-device" argument to synth_ice40	Eddie Hung	2019-04-17	4	-7/+20
* \|	Missing abc_flop_q attribute on SPRAM	Eddie Hung	2019-04-17	1	-1/+1
* \|	Cope with inout ports	Eddie Hung	2019-04-17	1	-1/+15
* \|	Map to SB_LUT4 from fastest input first	Eddie Hung	2019-04-17	1	-7/+11
* \|	Working ABC9 script	Eddie Hung	2019-04-17	1	-2/+2
* \|	Stop topological sort at abc_flop_q	Eddie Hung	2019-04-17	1	-7/+13
* \|	Mark seq output ports with "abc_flop_q" attr	Eddie Hung	2019-04-17	1	-24/+24
* \|	Also update Makefile.inc	Eddie Hung	2019-04-17	1	-3/+3
* \|	synth_ice40 to use renamed files	Eddie Hung	2019-04-17	1	-2/+2
* \|	Rename to abc.*	Eddie Hung	2019-04-17	3	-0/+0
* \|	Revert "Try using an ICE40_CARRY_LUT primitive to avoid ABC issues"	Eddie Hung	2019-04-17	7	-102/+35
* \|	Try using an ICE40_CARRY_LUT primitive to avoid ABC issues	Eddie Hung	2019-04-17	7	-35/+102
* \|	Remove init* from xaiger, also topo-sort cells for box flow	Eddie Hung	2019-04-17	1	-95/+157
* \|	Merge remote-tracking branch 'origin/master' into xaig	Eddie Hung	2019-04-17	1	-1/+1
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\| *	Update to ABC d1b6413	Clifford Wolf	2019-04-17	1	-1/+1
* \|	Ignore a/i/o/h XAIGER extensions	Eddie Hung	2019-04-17	1	-0/+7
* \|	Fix spacing	Eddie Hung	2019-04-17	1	-5/+5
* \|	Optimise	Eddie Hung	2019-04-16	1	-4/+3
* \|	Add SB_LUT4 to box library	Eddie Hung	2019-04-16	3	-0/+16
* \|	Add ice40 box files	Eddie Hung	2019-04-16	6	-1/+27
* \|	abc9 to output some more info	Eddie Hung	2019-04-16	1	-1/+2
* \|	CIs before PIs; also sort each cell's connections before iterating	Eddie Hung	2019-04-16	1	-5/+7
* \|	Merge remote-tracking branch 'origin/master' into xaig	Eddie Hung	2019-04-16	1	-28/+0
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\| *	Merge pull request #939 from YosysHQ/revert895	Eddie Hung	2019-04-16	1	-28/+0
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\| \| *	Revert #895	Eddie Hung	2019-04-16	1	-28/+0
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* \|	Port from xc7mux branch	Eddie Hung	2019-04-16	3	-54/+167
* \|	Re-enable partsel.v test	Eddie Hung	2019-04-16	1	-1/+0
* \|	abc9 to call "setundef -zero" behaving as for abc	Eddie Hung	2019-04-16	1	-0/+3
* \|	Merge remote-tracking branch 'origin/master' into xaig	Eddie Hung	2019-04-15	3	-6/+5
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\| *	Merge pull request #937 from YosysHQ/revert-932-eddie/fixdlatch	Eddie Hung	2019-04-15	2	-4/+3
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\| \| *	Revert "Recognise default entry in case even if all cases covered (fix for #9...	Eddie Hung	2019-04-15	2	-4/+3
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\| *	Merge pull request #936 from YosysHQ/README-fix-quotes	Eddie Hung	2019-04-15	1	-2/+2
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\| \| *	README: fix some incorrect quoting.	whitequark	2019-04-15	1	-2/+2
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* \|	Forgot backslashes	Eddie Hung	2019-04-12	1	-1/+1
* \|	Handle __dummy_o__ and __const[01]__ in read_aiger not abc	Eddie Hung	2019-04-12	2	-18/+8
* \|	abc to ignore __dummy_o__ and __const[01]__ when re-integrating	Eddie Hung	2019-04-12	1	-6/+20
* \|	Output __const0__ and __const1__ CIs	Eddie Hung	2019-04-12	1	-7/+10
* \|	Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig	Eddie Hung	2019-04-12	1	-12/+32
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\| * \|	Fix inout handling for -map option	Eddie Hung	2019-04-12	1	-10/+30