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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-16 17:34:11 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-16 17:34:11 -0700 |
| commit | 743c164eee06abb44601e00304db18cdb36a180f (patch) | |
| tree | d8fd3b12fb792028d7ec8dbcd446470e69623cbb | |
| parent | 7980118d74aae04479be3b9e9b59f95bf3bfbfe5 (diff) | |
| download | yosys-743c164eee06abb44601e00304db18cdb36a180f.tar.gz yosys-743c164eee06abb44601e00304db18cdb36a180f.tar.bz2 yosys-743c164eee06abb44601e00304db18cdb36a180f.zip | |
Add SB_LUT4 to box library
| -rw-r--r-- | techlibs/ice40/cells.box | 7 | ||||
| -rw-r--r-- | techlibs/ice40/cells_box.v | 7 | ||||
| -rw-r--r-- | techlibs/ice40/lut.lut | 2 |
3 files changed, 16 insertions, 0 deletions
diff --git a/techlibs/ice40/cells.box b/techlibs/ice40/cells.box index e4cfb71e6..d775efa78 100644 --- a/techlibs/ice40/cells.box +++ b/techlibs/ice40/cells.box @@ -1,6 +1,13 @@ +# From https://github.com/cliffordwolf/icestorm/blob/81c33a3/icefuzz/timings_hx8k.txt + # NB: Inputs/Outputs must be ordered alphabetically # Inputs: CI I0 I1 # Outputs: CO SB_CARRY 1 1 3 1 126 259 231 + +# Inputs: I0 I1 I2 I3 +# Outputs: O +SB_LUT4 2 1 4 1 +316 379 400 449 diff --git a/techlibs/ice40/cells_box.v b/techlibs/ice40/cells_box.v index cca88f9aa..e2a54a42c 100644 --- a/techlibs/ice40/cells_box.v +++ b/techlibs/ice40/cells_box.v @@ -3,3 +3,10 @@ module SB_CARRY (output CO, input CI, I0, I1); assign CO = (I0 && I1) || ((I0 || I1) && CI); endmodule +(* abc_box_id = 2 *) +module SB_LUT4 (output O, input I0, I1, I2, I3); + parameter [15:0] LUT_INIT = 0; + // Indicate this is a black-box + assign O = 1'b0; +endmodule + diff --git a/techlibs/ice40/lut.lut b/techlibs/ice40/lut.lut index 48da89f46..6fa0682da 100644 --- a/techlibs/ice40/lut.lut +++ b/techlibs/ice40/lut.lut @@ -1,3 +1,5 @@ +# From https://github.com/cliffordwolf/icestorm/blob/81c33a3/icefuzz/timings_hx8k.txt + 1 1 316 2 1 316 379 3 1 316 379 400 |