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| author | Jannis Harder <me@jix.one> | 2023-04-18 10:45:14 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-04-18 10:45:14 +0200 |
| commit | 88ae463ffe4150c31de952aa0725172ae2cc04bf (patch) | |
| tree | 8fe3ac1416b7074aca3f7bab695495807d2291ee | |
| parent | a9c792dceef4be21059ff4732d1aff62e67d96bc (diff) | |
| parent | a3a8f7be38e8e760c1de87bc71bb6336a486a40d (diff) | |
| download | yosys-88ae463ffe4150c31de952aa0725172ae2cc04bf.tar.gz yosys-88ae463ffe4150c31de952aa0725172ae2cc04bf.tar.bz2 yosys-88ae463ffe4150c31de952aa0725172ae2cc04bf.zip | |
Merge pull request #3732 from hzeller/20230417-remote-statement-no-effect
Remove a statement without effect.
| -rw-r--r-- | kernel/yw.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/kernel/yw.cc b/kernel/yw.cc index 73e7710db..ef043fb0d 100644 --- a/kernel/yw.cc +++ b/kernel/yw.cc @@ -190,8 +190,6 @@ RTLIL::Const ReadWitness::get_bits(int t, int bits_offset, int width) const int read_begin = GetSize(bits) - 1 - bits_offset; int read_end = max(-1, read_begin - width); - min(width, GetSize(bits) - bits_offset); - for (int i = read_begin, j = 0; i > read_end; i--, j++) { RTLIL::State bit = State::Sa; switch (bits[i]) { |